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Diffstat (limited to 'arch/riscv64/include')
-rw-r--r--arch/riscv64/include/csr.h8
-rw-r--r--arch/riscv64/include/regs.h2
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/riscv64/include/csr.h b/arch/riscv64/include/csr.h
index 93bba2b..ade397c 100644
--- a/arch/riscv64/include/csr.h
+++ b/arch/riscv64/include/csr.h
@@ -55,15 +55,15 @@
#endif
#define csr_read(csr, res) \
- __asm__ volatile("csrr %0, " __ASM_STR(csr) : "=r"(res) : : "memory")
+ __asm__ volatile ("csrr %0, " __ASM_STR(csr) : "=r" (res) : : "memory")
#define csr_write(csr, val) \
- __asm__ volatile("csrw " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
+ __asm__ volatile ("csrw " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
#define csr_set(csr, val) \
- __asm__ volatile("csrs " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
+ __asm__ volatile ("csrs " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
#define csr_clear(csr, val) \
- __asm__ volatile("csrc " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
+ __asm__ volatile ("csrc " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
#endif /* APOS_CSR_H */
diff --git a/arch/riscv64/include/regs.h b/arch/riscv64/include/regs.h
index c785ea6..511934e 100644
--- a/arch/riscv64/include/regs.h
+++ b/arch/riscv64/include/regs.h
@@ -12,7 +12,7 @@
struct riscv_regs {
long ra, sp, gp, tp, t0, t1, t2, s0, s1, a0, a1, a2, a3, a4, a5, a6, a7,
- s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, t3, t4, t5, t6;
+ s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, t3, t4, t5, t6;
};
#endif /* APOS_RISCV_REGS_H */