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-rw-r--r--arch/riscv64/config.h13
-rw-r--r--arch/riscv64/gen/asm-offsets.c6
-rw-r--r--arch/riscv64/include/cpu.h9
-rw-r--r--arch/riscv64/include/csr.h5
-rw-r--r--arch/riscv64/include/lock.h14
-rw-r--r--arch/riscv64/include/pages.h35
-rw-r--r--arch/riscv64/include/pmem.h9
-rw-r--r--arch/riscv64/include/regs.h9
-rw-r--r--arch/riscv64/include/sbi.h5
-rw-r--r--arch/riscv64/include/tcb.h5
-rw-r--r--arch/riscv64/include/types.h6
-rw-r--r--arch/riscv64/include/vmem.h7
-rw-r--r--arch/riscv64/init/init.c6
-rw-r--r--arch/riscv64/kernel/cpu.c5
-rw-r--r--arch/riscv64/kernel/irq.c5
-rw-r--r--arch/riscv64/kernel/main.c5
-rw-r--r--arch/riscv64/kernel/pmem.c5
-rw-r--r--arch/riscv64/kernel/power.c5
-rw-r--r--arch/riscv64/kernel/proc.c5
-rw-r--r--arch/riscv64/kernel/sbi.c5
-rw-r--r--arch/riscv64/kernel/timer.c5
-rw-r--r--arch/riscv64/kernel/vmem.c5
22 files changed, 172 insertions, 2 deletions
diff --git a/arch/riscv64/config.h b/arch/riscv64/config.h
index ee337b4..33c84a0 100644
--- a/arch/riscv64/config.h
+++ b/arch/riscv64/config.h
@@ -1,3 +1,15 @@
+#ifndef APOS_RISCV_CONFIG_H
+#define APOS_RISCV_CONFIG_H
+
+/**
+ * @file config.h
+ * riscv64 specific configuration parameters, currently mixing user-specified
+ * and immutable parameters. Included on the command line by
+ * -include.
+ *
+ * @todo Consider separating user-specified and immutable parameters.
+ */
+
#include <apos/sizes.h>
/* --- START ARCH USER CONFIG VALUES --- */
@@ -52,3 +64,4 @@
#define PROC_STACK_TOP (SZ_4G)
#define PROC_STACK_BASE (SZ_4G - SZ_8M)
#endif
+#endif /* APOS_RISCV_CONFIG_H */
diff --git a/arch/riscv64/gen/asm-offsets.c b/arch/riscv64/gen/asm-offsets.c
index 6920245..bbd1712 100644
--- a/arch/riscv64/gen/asm-offsets.c
+++ b/arch/riscv64/gen/asm-offsets.c
@@ -1,3 +1,9 @@
+/**
+ * @file asm-offsets.c
+ * riscv64 file used to generate offsets to register slots in stack. See \ref
+ * _save_context.
+ */
+
#include <apos/utils.h>
#include <regs.h>
diff --git a/arch/riscv64/include/cpu.h b/arch/riscv64/include/cpu.h
index 40a8c17..5d496ea 100644
--- a/arch/riscv64/include/cpu.h
+++ b/arch/riscv64/include/cpu.h
@@ -1 +1,8 @@
-/* empty */
+#ifndef APOS_RISCV_CPU_H
+#define APOS_RISCV_CPU_H
+/**
+ * @file cpu.h
+ * riscv64 cpu header, currently empty but kept around for forwards
+ * compatibility.
+ */
+#endif /* APOS_RISCV_CPU_H */
diff --git a/arch/riscv64/include/csr.h b/arch/riscv64/include/csr.h
index ae0763b..93bba2b 100644
--- a/arch/riscv64/include/csr.h
+++ b/arch/riscv64/include/csr.h
@@ -1,6 +1,11 @@
#ifndef APOS_CSR_H
#define APOS_CSR_H
+/**
+ * @file csr.h
+ * riscv64-specific header for CSR handling
+ */
+
#define SATP_MODE_Sv32 0x80000000
#define SATP_MODE_Sv39 0x8000000000000000
#define SATP_MODE_Sv48 0x9000000000000000
diff --git a/arch/riscv64/include/lock.h b/arch/riscv64/include/lock.h
index 4f71344..15e5765 100644
--- a/arch/riscv64/include/lock.h
+++ b/arch/riscv64/include/lock.h
@@ -1 +1,15 @@
+#ifndef APOS_RISCV_LOCK_H
+#define APOS_RISCV_LOCK_H
+/**
+ * @file lock.h
+ * riscv64 implementation of arch-specific lock behaviour, currently only \ref
+ * optional_pause().
+ */
+
+/**
+ * riscv64 does not have a way to inform the cpu of a spinlock (at least at the
+ * moment, it may be added in as a hint later on)
+ */
#define optional_pause()
+
+#endif /* APOS_RISCV_LOCK_H */
diff --git a/arch/riscv64/include/pages.h b/arch/riscv64/include/pages.h
index 20dab3d..3f4b632 100644
--- a/arch/riscv64/include/pages.h
+++ b/arch/riscv64/include/pages.h
@@ -1,14 +1,49 @@
#ifndef APOS_RISCV_PAGES_H
#define APOS_RISCV_PAGES_H
+/**
+ * @file pages.h
+ * riscv64-specific shorthands for some page sizes.
+ */
+
+/**
+ * riscv64 4KiB page, order 0.
+ */
#define MM_KPAGE MM_O0
+
+/**
+ * riscv64 2MiB page, order 1.
+ */
#define MM_MPAGE MM_O1
+
+/**
+ * riscv64 1GiB page, order 2.
+ */
#define MM_GPAGE MM_O2
+
+/**
+ * riscv64 512GiB page, order 3.
+ */
#define MM_TPAGE MM_O3
+/**
+ * riscv64 4KiB page size.
+ */
#define MM_KPAGE_SIZE SZ_4K
+
+/**
+ * riscv64 2MiB page size.
+ */
#define MM_MPAGE_SIZE SZ_2M
+
+/**
+ * riscv64 1GiB page size.
+ */
#define MM_GPAGE_SIZE SZ_1G
+
+/**
+ * riscv64 512GiB page size.
+ */
#define MM_TPAGE_SIZE SZ_512G
#endif /* APOS_RISCV_PAGES_H */
diff --git a/arch/riscv64/include/pmem.h b/arch/riscv64/include/pmem.h
index 40a8c17..56d22ca 100644
--- a/arch/riscv64/include/pmem.h
+++ b/arch/riscv64/include/pmem.h
@@ -1 +1,8 @@
-/* empty */
+#ifndef APOS_RISCV_PMEM_H
+#define APOS_RISCV_PMEM_H
+/**
+ * @file pmem.h
+ * riscv64-specific physical memory, currently empty but kept around for
+ * forwards compatibility.
+ */
+#endif /* APOS_RISCV_PMEM_H */
diff --git a/arch/riscv64/include/regs.h b/arch/riscv64/include/regs.h
index 699af8b..c785ea6 100644
--- a/arch/riscv64/include/regs.h
+++ b/arch/riscv64/include/regs.h
@@ -1,6 +1,15 @@
#ifndef APOS_RISCV_REGS_H
#define APOS_RISCV_REGS_H
+/**
+ * @file regs.h
+ * riscv64 registers, currently only base extension integer regs. Used to \ref
+ * _save_context. Used in \ref arch/riscv64/gen/asm-offsets.c to generate a list
+ * of offsets usable from assembly.
+ *
+ * @todo Implement sacing floating point, vector, etc. registers.
+ */
+
struct riscv_regs {
long ra, sp, gp, tp, t0, t1, t2, s0, s1, a0, a1, a2, a3, a4, a5, a6, a7,
s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, t3, t4, t5, t6;
diff --git a/arch/riscv64/include/sbi.h b/arch/riscv64/include/sbi.h
index 3beedd2..44eec4f 100644
--- a/arch/riscv64/include/sbi.h
+++ b/arch/riscv64/include/sbi.h
@@ -1,6 +1,11 @@
#ifndef APOS_RISCV_SBI_H
#define APOS_RISCV_SBI_H
+/**
+ * @file sbi.h
+ * riscv64-specific OpenSBI definitions.
+ */
+
#include <apos/types.h>
struct sbiret {
diff --git a/arch/riscv64/include/tcb.h b/arch/riscv64/include/tcb.h
index d1e0717..be6d58a 100644
--- a/arch/riscv64/include/tcb.h
+++ b/arch/riscv64/include/tcb.h
@@ -1,6 +1,11 @@
#ifndef ARCH_RISCV_TCB_H
#define ARCH_RISCV_TCB_H
+/**
+ * @file tcb.h
+ * riscv64 definitions of arch-specific tcb data.
+ */
+
struct arch_tcbd {
/* empty for now, but should probably be filled with stuff like register
* saving of something */
diff --git a/arch/riscv64/include/types.h b/arch/riscv64/include/types.h
index 59a2762..8cb41bf 100644
--- a/arch/riscv64/include/types.h
+++ b/arch/riscv64/include/types.h
@@ -1,6 +1,12 @@
#ifndef APOS_RISCV_TYPES_H
#define APOS_RISCV_TYPES_H
+/**
+ * @file types.h
+ * riscv64 definitions of arch-specific data types, possibly made redundant by
+ * \ref include/apos/types.h but kept around just to be sure.
+ */
+
#include <apos/types.h>
typedef uintptr_t vm_t;
diff --git a/arch/riscv64/include/vmem.h b/arch/riscv64/include/vmem.h
index 7e8e915..a557513 100644
--- a/arch/riscv64/include/vmem.h
+++ b/arch/riscv64/include/vmem.h
@@ -1,6 +1,13 @@
#ifndef APOS_RISCV_VMAP_H
#define APOS_RISCV_VMAP_H
+/**
+ * @file vmem.h
+ * riscv64 definitions of arch-specific virtual memory data types and macros.
+ * Very likely VM_* should be moved to \ref include/apos/vmem.h and made
+ * architecture-nonspecific, but works for now.
+ */
+
#include <apos/types.h>
#include <apos/attrs.h>
diff --git a/arch/riscv64/init/init.c b/arch/riscv64/init/init.c
index bc68ea8..5984d3c 100644
--- a/arch/riscv64/init/init.c
+++ b/arch/riscv64/init/init.c
@@ -1,3 +1,9 @@
+/**
+ * @file init.c
+ * riscv64 'bootstrap', move actual kernel into place and jump to virtual
+ * memory.
+ */
+
#include <apos/types.h>
#include <apos/attrs.h>
#include <apos/utils.h>
diff --git a/arch/riscv64/kernel/cpu.c b/arch/riscv64/kernel/cpu.c
index 3583a94..0558040 100644
--- a/arch/riscv64/kernel/cpu.c
+++ b/arch/riscv64/kernel/cpu.c
@@ -1,3 +1,8 @@
+/**
+ * @file cpu.c
+ * riscv64 implementation of cpu handling.
+ */
+
#include <arch/cpu.h>
id_t cpu_id()
diff --git a/arch/riscv64/kernel/irq.c b/arch/riscv64/kernel/irq.c
index fdcd21e..eb5dc02 100644
--- a/arch/riscv64/kernel/irq.c
+++ b/arch/riscv64/kernel/irq.c
@@ -1,3 +1,8 @@
+/**
+ * @file irq.c
+ * riscv64 implementation of irq handling.
+ */
+
#include <apos/attrs.h>
#include <apos/debug.h>
#include <arch/irq.h>
diff --git a/arch/riscv64/kernel/main.c b/arch/riscv64/kernel/main.c
index 245fc9e..2cc1e12 100644
--- a/arch/riscv64/kernel/main.c
+++ b/arch/riscv64/kernel/main.c
@@ -1,3 +1,8 @@
+/**
+ * @file main.c
+ * riscv64 main
+ */
+
#include <apos/utils.h>
#include <arch/arch.h>
#include <csr.h>
diff --git a/arch/riscv64/kernel/pmem.c b/arch/riscv64/kernel/pmem.c
index fc3fa40..0657244 100644
--- a/arch/riscv64/kernel/pmem.c
+++ b/arch/riscv64/kernel/pmem.c
@@ -1,3 +1,8 @@
+/**
+ * @file pmem.c
+ * riscv64 implementation of arch-specific physical memory handling
+ */
+
#include <arch/pmem.h>
stat_t stat_pmem_conf(void *fdt, size_t *max_order, size_t *base_bits,
diff --git a/arch/riscv64/kernel/power.c b/arch/riscv64/kernel/power.c
index a4d6568..061c286 100644
--- a/arch/riscv64/kernel/power.c
+++ b/arch/riscv64/kernel/power.c
@@ -1,3 +1,8 @@
+/**
+ * @file power.c
+ * riscv64 implementation of arch-specific power handling.
+ */
+
#include <apos/power.h>
#include <sbi.h>
diff --git a/arch/riscv64/kernel/proc.c b/arch/riscv64/kernel/proc.c
index 8653254..51a4ab3 100644
--- a/arch/riscv64/kernel/proc.c
+++ b/arch/riscv64/kernel/proc.c
@@ -1,3 +1,8 @@
+/**
+ * @file proc.c
+ * riscv64 implementation of arch-specific process handling.
+ */
+
#include <apos/tcb.h>
#include <apos/elf.h>
#include <regs.h>
diff --git a/arch/riscv64/kernel/sbi.c b/arch/riscv64/kernel/sbi.c
index 93f5785..feadd8d 100644
--- a/arch/riscv64/kernel/sbi.c
+++ b/arch/riscv64/kernel/sbi.c
@@ -1,3 +1,8 @@
+/**
+ * @file sbi.c
+ * riscv64 specific OpenSBI handling.
+ */
+
#include <sbi.h>
struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
diff --git a/arch/riscv64/kernel/timer.c b/arch/riscv64/kernel/timer.c
index 1f79c5b..98f8e16 100644
--- a/arch/riscv64/kernel/timer.c
+++ b/arch/riscv64/kernel/timer.c
@@ -1,3 +1,8 @@
+/**
+ * @file timer.c
+ * riscv64 implementation of arch-specific timers.
+ */
+
#include <arch/timer.h>
#include <libfdt.h>
#include <csr.h>
diff --git a/arch/riscv64/kernel/vmem.c b/arch/riscv64/kernel/vmem.c
index 29bc084..56b04f3 100644
--- a/arch/riscv64/kernel/vmem.c
+++ b/arch/riscv64/kernel/vmem.c
@@ -1,3 +1,8 @@
+/**
+ * @file vmem.c
+ * riscv64 implementation of arch-specific virtual memory handling.
+ */
+
#include <apos/string.h>
#include <apos/pmem.h>
#include <apos/vmem.h>
generated by cgit v1.3 (git 2.53.0) at 2026-08-27 06:13:12 +0000