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-rw-r--r--arch/riscv64/config.h14
-rw-r--r--arch/riscv64/include/sbi.h13
-rw-r--r--arch/riscv64/include/vmem.h16
-rw-r--r--arch/riscv64/init/init.c7
-rw-r--r--arch/riscv64/kernel/power.c22
-rw-r--r--arch/riscv64/kernel/sbi.c30
6 files changed, 53 insertions, 49 deletions
diff --git a/arch/riscv64/config.h b/arch/riscv64/config.h
index b52585b..ee337b4 100644
--- a/arch/riscv64/config.h
+++ b/arch/riscv64/config.h
@@ -2,17 +2,17 @@
/* --- START ARCH USER CONFIG VALUES --- */
/* physical address to which the kernel will be loaded */
-#define RAM_BASE 0x80000000
-#define PM_KERN_BASE (RAM_BASE + SZ_512K)
-#define PM_KERN_SIZE (SZ_256K)
-#define PM_KERN_TOP (PM_KERN_BASE + PM_KERN_SIZE)
+#define RAM_BASE 0x80000000
+#define PM_KERN_BASE (RAM_BASE + SZ_512K)
+#define PM_KERN_SIZE (SZ_256K)
+#define PM_KERN_TOP (PM_KERN_BASE + PM_KERN_SIZE)
/* --- END ARCH USER CONFIG VALUES --- */
/* don't touch >:( */
-#define PM_STACK_BASE (PM_KERN_BASE + SZ_256K)
-#define PM_STACK_SIZE (SZ_256K)
-#define PM_STACK_TOP (PM_STACK_BASE + PM_STACK_SIZE)
+#define PM_STACK_BASE (PM_KERN_BASE + SZ_256K)
+#define PM_STACK_SIZE (SZ_256K)
+#define PM_STACK_TOP (PM_STACK_BASE + PM_STACK_SIZE)
#if __riscv_xlen == 64
/* 64bit */
diff --git a/arch/riscv64/include/sbi.h b/arch/riscv64/include/sbi.h
index b750475..3beedd2 100644
--- a/arch/riscv64/include/sbi.h
+++ b/arch/riscv64/include/sbi.h
@@ -26,24 +26,27 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
unsigned long arg3, unsigned long arg4,
unsigned long arg5);
-#define EID_TIME 0x54494D45
+#define EID_TIME 0x54494D45
#define FID_SET_TIMER 0
static inline struct sbiret sbi_set_timer(uint64_t stime_value)
{
/* TODO: read timebase from fdt, seems to be clocks/sec for accurate
* timers */
#if __riscv_xlen == 32
- return sbi_ecall(EID_TIME, FID_SET_TIMER, stime_value, stime_value >> 32, 0, 0, 0, 0);
+ return sbi_ecall(EID_TIME, FID_SET_TIMER, stime_value,
+ stime_value >> 32, 0, 0, 0, 0);
#else
return sbi_ecall(EID_TIME, FID_SET_TIMER, stime_value, 0, 0, 0, 0, 0);
#endif
}
-#define EID_SRST 0x53525354
+#define EID_SRST 0x53525354
#define FID_RESET 0
-static inline struct sbiret sbi_system_reset(uint32_t reset_type, uint32_t reset_reason)
+static inline struct sbiret sbi_system_reset(uint32_t reset_type,
+ uint32_t reset_reason)
{
- return sbi_ecall(EID_SRST, FID_RESET, reset_type, reset_reason, 0, 0, 0, 0);
+ return sbi_ecall(EID_SRST, FID_RESET, reset_type, reset_reason, 0, 0, 0,
+ 0);
}
#endif /* APOS_RISCV_SBI_H */
diff --git a/arch/riscv64/include/vmem.h b/arch/riscv64/include/vmem.h
index 4446aef..9816110 100644
--- a/arch/riscv64/include/vmem.h
+++ b/arch/riscv64/include/vmem.h
@@ -6,14 +6,14 @@
#define RISCV_NUM_LEAVES (4096 / sizeof(void *))
-#define VM_V (1 << 0)
-#define VM_R (1 << 1)
-#define VM_W (1 << 2)
-#define VM_X (1 << 3)
-#define VM_U (1 << 4)
-#define VM_G (1 << 5)
-#define VM_A (1 << 6)
-#define VM_D (1 << 7)
+#define VM_V (1 << 0)
+#define VM_R (1 << 1)
+#define VM_W (1 << 2)
+#define VM_X (1 << 3)
+#define VM_U (1 << 4)
+#define VM_G (1 << 5)
+#define VM_A (1 << 6)
+#define VM_D (1 << 7)
enum mm_mode {
Sv48,
diff --git a/arch/riscv64/init/init.c b/arch/riscv64/init/init.c
index b28c581..31a9155 100644
--- a/arch/riscv64/init/init.c
+++ b/arch/riscv64/init/init.c
@@ -21,13 +21,14 @@ void init_bootmem()
/* direct mapping (temp) */
for (size_t i = 0; i < CSTACK_PAGE; ++i)
- root_branch->leaf[i] = (struct vm_branch *)to_pte(SZ_1G * i, flags);
+ root_branch->leaf[i] =
+ (struct vm_branch *)to_pte(SZ_1G * i, flags);
/* kernel (also sort of direct mapping) */
flags |= VM_G;
for (size_t i = KSTART_PAGE; i < IO_PAGE; ++i)
- root_branch->leaf[i] =
- (struct vm_branch *)to_pte(RAM_BASE + SZ_1G * (i - 256), flags);
+ root_branch->leaf[i] = (struct vm_branch *)to_pte(
+ RAM_BASE + SZ_1G * (i - 256), flags);
/* kernel IO, map to 0 for now, will be updated in the future */
root_branch->leaf[IO_PAGE] = (struct vm_branch *)to_pte(0, flags);
diff --git a/arch/riscv64/kernel/power.c b/arch/riscv64/kernel/power.c
index 877c001..a4d6568 100644
--- a/arch/riscv64/kernel/power.c
+++ b/arch/riscv64/kernel/power.c
@@ -2,10 +2,10 @@
#include <sbi.h>
/* shutdown reason */
-#define SBI_NO_REASON 0
+#define SBI_NO_REASON 0
/* shutdown type */
-#define SBI_SHUTDOWN 0
+#define SBI_SHUTDOWN 0
#define SBI_COLD_REBOOT 1
#define SBI_WARM_REBOOT 2
@@ -14,17 +14,17 @@ stat_t poweroff(enum poweroff_type type)
/* TODO: this only shuts down the cpu itself, but may leave the SOC
* active. Should read from fdt poweroff and syscon-poweroff etc */
switch (type) {
- case SHUTDOWN:
- sbi_system_reset(SBI_SHUTDOWN, SBI_NO_REASON);
- return ERR_MISC;
+ case SHUTDOWN:
+ sbi_system_reset(SBI_SHUTDOWN, SBI_NO_REASON);
+ return ERR_MISC;
- case COLD_REBOOT:
- sbi_system_reset(SBI_COLD_REBOOT, SBI_NO_REASON);
- return ERR_MISC;
+ case COLD_REBOOT:
+ sbi_system_reset(SBI_COLD_REBOOT, SBI_NO_REASON);
+ return ERR_MISC;
- case WARM_REBOOT:
- sbi_system_reset(SBI_WARM_REBOOT, SBI_NO_REASON);
- return ERR_MISC;
+ case WARM_REBOOT:
+ sbi_system_reset(SBI_WARM_REBOOT, SBI_NO_REASON);
+ return ERR_MISC;
};
return ERR_INVAL;
diff --git a/arch/riscv64/kernel/sbi.c b/arch/riscv64/kernel/sbi.c
index cd3eb1b..93f5785 100644
--- a/arch/riscv64/kernel/sbi.c
+++ b/arch/riscv64/kernel/sbi.c
@@ -1,25 +1,25 @@
#include <sbi.h>
struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
- unsigned long arg1, unsigned long arg2,
- unsigned long arg3, unsigned long arg4,
- unsigned long arg5)
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5)
{
struct sbiret ret;
- register uintptr_t a0 __asm__ ("a0") = (uintptr_t)(arg0);
- register uintptr_t a1 __asm__ ("a1") = (uintptr_t)(arg1);
- register uintptr_t a2 __asm__ ("a2") = (uintptr_t)(arg2);
- register uintptr_t a3 __asm__ ("a3") = (uintptr_t)(arg3);
- register uintptr_t a4 __asm__ ("a4") = (uintptr_t)(arg4);
- register uintptr_t a5 __asm__ ("a5") = (uintptr_t)(arg5);
- register uintptr_t a6 __asm__ ("a6") = (uintptr_t)(fid);
- register uintptr_t a7 __asm__ ("a7") = (uintptr_t)(ext);
+ register uintptr_t a0 __asm__("a0") = (uintptr_t)(arg0);
+ register uintptr_t a1 __asm__("a1") = (uintptr_t)(arg1);
+ register uintptr_t a2 __asm__("a2") = (uintptr_t)(arg2);
+ register uintptr_t a3 __asm__("a3") = (uintptr_t)(arg3);
+ register uintptr_t a4 __asm__("a4") = (uintptr_t)(arg4);
+ register uintptr_t a5 __asm__("a5") = (uintptr_t)(arg5);
+ register uintptr_t a6 __asm__("a6") = (uintptr_t)(fid);
+ register uintptr_t a7 __asm__("a7") = (uintptr_t)(ext);
- __asm__ volatile ("ecall"
- : "+r" (a0), "+r" (a1)
- : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
- : "memory");
+ __asm__ volatile("ecall"
+ : "+r"(a0), "+r"(a1)
+ : "r"(a2), "r"(a3), "r"(a4), "r"(a5), "r"(a6), "r"(a7)
+ : "memory");
ret.error = a0;
ret.value = a1;
generated by cgit v1.3 (git 2.53.0) at 2026-08-27 06:12:55 +0000