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-rw-r--r--arch/riscv64/kernel/csr.h2
-rw-r--r--arch/riscv64/kernel/irq.c8
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/riscv64/kernel/csr.h b/arch/riscv64/kernel/csr.h
index bc48464..9b7b78a 100644
--- a/arch/riscv64/kernel/csr.h
+++ b/arch/riscv64/kernel/csr.h
@@ -40,8 +40,6 @@
/** Address of \c sstatus CSR. */
#define CSR_SSTATUS 0x100
-#define SR_SPIE 0b10
-
/** Address of \c sie CSR. */
#define CSR_SIE 0x104
diff --git a/arch/riscv64/kernel/irq.c b/arch/riscv64/kernel/irq.c
index 2ef15cc..0c129b9 100644
--- a/arch/riscv64/kernel/irq.c
+++ b/arch/riscv64/kernel/irq.c
@@ -38,16 +38,18 @@ stat_t deactivate_irq(irq_t id)
return OK;
}
+/** Bit pattern representing supervisor external, timer and software irqs. */
+#define SR_IRQS (1 << 9) | (1 << 5) | (1 << 3)
+
/* very simple for now */
void enable_irqs()
{
- /* should be supervisor external interrupt */
- csr_set(CSR_SIE, 1 << 9);
+ csr_set(CSR_SIE, SR_IRQS);
}
void disable_irqs()
{
- csr_clear(CSR_SIE, 1 << 9);
+ csr_clear(CSR_SIE, SR_IRQS);
}
irq_t get_irq()