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authorKimplul <kimi.h.kuparinen@gmail.com>2021-12-29 18:47:16 +0200
committerKimplul <kimi.h.kuparinen@gmail.com>2021-12-29 18:49:28 +0200
commit4e5595a089c815febd7a0d42ab62940bf13f73ac (patch)
tree322f35d9315e9966de8a66052811858df0144085 /backend_api.txt
parenta12e50e5a7dae52ed8bd5a24cc6576371e20985b (diff)
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Preparations for refactoring
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+Some functionality the different arch backends should support
+
++ cpu_id() - return the ID of the current process executing the code, with
+regular indexing (0 - MAX_CPUS), that is.
+
++ map_vpage() - map one page according to the specs given.
++ stat_vpage() - get info about mapping at virtual address.
++ mod_vpage() - modify mapping at virtual address.
++ unmap_vpage() - unmap page at virtual address.
+
++ flush_tlb() - flush TLB cache for running cpu.
++ flush_tlb_all() - flush all TLC caches. (note, flush_tlb is allowed to just
+ call flush_tlb_all if the arch doesn't support per-cpu
+ flushing.)
++ flush_tlb_region() - ??? maybe?
+
++ enable_irq() - enable interrupts
++ disable_irq() - disable interrupts
+
++ probably more stuff, just not entirely sure what parts should go where yet.
++ the backend also has to define a memory layout, of course.