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authorKimplul <kimi.h.kuparinen@gmail.com>2022-04-10 15:39:41 +0300
committerKimplul <kimi.h.kuparinen@gmail.com>2022-04-10 15:42:04 +0300
commit8aa17b12f29536ea9c8b6ca22c7f153e8d90fa3b (patch)
treee7dba9b6b9cdcd1d04cba639c8f76e9685ac549f /arch
parent4760462d9b3bf2aba8664c57be85f4adbfa164a2 (diff)
downloadkmi-8aa17b12f29536ea9c8b6ca22c7f153e8d90fa3b.tar.gz
kmi-8aa17b12f29536ea9c8b6ca22c7f153e8d90fa3b.zip
add clang format and run it
Diffstat (limited to 'arch')
-rw-r--r--arch/riscv64/config.h36
-rw-r--r--arch/riscv64/include/csr.h69
-rw-r--r--arch/riscv64/include/pages.h8
-rw-r--r--arch/riscv64/include/sbi.h7
-rw-r--r--arch/riscv64/init/init.c28
-rw-r--r--arch/riscv64/kernel/irq.c5
-rw-r--r--arch/riscv64/kernel/pmem.c5
-rw-r--r--arch/riscv64/kernel/proc.c4
-rw-r--r--arch/riscv64/kernel/vmem.c83
9 files changed, 128 insertions, 117 deletions
diff --git a/arch/riscv64/config.h b/arch/riscv64/config.h
index 0ef22fa..707c0b9 100644
--- a/arch/riscv64/config.h
+++ b/arch/riscv64/config.h
@@ -2,33 +2,33 @@
/* --- START ARCH USER CONFIG VALUES --- */
/* physical address to which the kernel will be loaded */
-#define RAM_BASE 0x80000000
-#define PM_KERN_BASE (RAM_BASE + SZ_512K)
-#define PM_KERN_SIZE (SZ_256K)
-#define PM_KERN_TOP (PM_KERN_BASE + PM_KERN_SIZE)
+#define RAM_BASE 0x80000000
+#define PM_KERN_BASE (RAM_BASE + SZ_512K)
+#define PM_KERN_SIZE (SZ_256K)
+#define PM_KERN_TOP (PM_KERN_BASE + PM_KERN_SIZE)
/* --- END ARCH USER CONFIG VALUES --- */
/* don't touch >:( */
-#define PM_STACK_BASE (PM_KERN_BASE + SZ_256K)
-#define PM_STACK_SIZE (SZ_256K)
-#define PM_STACK_TOP (PM_STACK_BASE + PM_STACK_SIZE)
+#define PM_STACK_BASE (PM_KERN_BASE + SZ_256K)
+#define PM_STACK_SIZE (SZ_256K)
+#define PM_STACK_TOP (PM_STACK_BASE + PM_STACK_SIZE)
-#define VM_DMAP (0xffffffc000000000) /* testing for now */
-#define VM_KERN (VM_DMAP + SZ_256K)
-#define TMP_PTE (-SZ_2G)
-#define ROOT_PTE (0)
-#define ROOT_REGION (SZ_4K)
+#define VM_DMAP (0xffffffc000000000) /* testing for now */
+#define VM_KERN (VM_DMAP + SZ_256K)
+#define TMP_PTE (-SZ_2G)
+#define ROOT_PTE (0)
+#define ROOT_REGION (SZ_4K)
-#define IO_PAGE 511
-#define KSTART_PAGE 256
-#define CSTACK_PAGE 255
+#define IO_PAGE 511
+#define KSTART_PAGE 256
+#define CSTACK_PAGE 255
/* assume Sv39, probably wouldn't be too difficult to use runtime parameters
* instead. First 4K is reserved for NULL, but I suppose it could be mapped
* later if *absolutely* necessary. */
-#define UVMEM_START (SZ_4K)
-#define UVMEM_END (SZ_256G - SZ_1G)
+#define UVMEM_START (SZ_4K)
+#define UVMEM_END (SZ_256G - SZ_1G)
-#define PROC_STACK_TOP (SZ_256G)
+#define PROC_STACK_TOP (SZ_256G)
#define PROC_STACK_BASE (SZ_256G - SZ_1G)
diff --git a/arch/riscv64/include/csr.h b/arch/riscv64/include/csr.h
index 43c365b..7f9fc1f 100644
--- a/arch/riscv64/include/csr.h
+++ b/arch/riscv64/include/csr.h
@@ -3,43 +3,42 @@
#include <apos/utils.h>
-#define SATP_MODE_Sv32 0x80000000
-#define SATP_MODE_Sv39 0x8000000000000000
-#define SATP_MODE_Sv48 0x9000000000000000
-
+#define SATP_MODE_Sv32 0x80000000
+#define SATP_MODE_Sv39 0x8000000000000000
+#define SATP_MODE_Sv48 0x9000000000000000
/* supervisor CSR registers */
-#define CSR_SSTATUS 0x100
-#define CSR_SIE 0x104
-#define CSR_STVEC 0x105
-#define CSR_SCOUNTEREN 0x106
+#define CSR_SSTATUS 0x100
+#define CSR_SIE 0x104
+#define CSR_STVEC 0x105
+#define CSR_SCOUNTEREN 0x106
-#define CSR_SENVCFG 0x10A
+#define CSR_SENVCFG 0x10A
-#define CSR_SSCRATCH 0x140
-#define CSR_SEPC 0x141
-#define CSR_SCAUSE 0x142
-#define CSR_STVAL 0x143
-#define CSR_SIP 0x144
+#define CSR_SSCRATCH 0x140
+#define CSR_SEPC 0x141
+#define CSR_SCAUSE 0x142
+#define CSR_STVAL 0x143
+#define CSR_SIP 0x144
-#define CSR_SATP 0x180
+#define CSR_SATP 0x180
-#define CSR_SCONTEXT 0x5A8
+#define CSR_SCONTEXT 0x5A8
/* Exception causes */
-#define EXC_INST_MISALIGNED 0
-#define EXC_INST_ACCESS 1
-#define EXC_BREAKPOINT 3
-#define EXC_LOAD_ACCESS 5
-#define EXC_STORE_ACCESS 7
-#define EXC_SYSCALL 8
-#define EXC_INST_PAGE_FAULT 12
-#define EXC_LOAD_PAGE_FAULT 13
-#define EXC_STORE_PAGE_FAULT 15
+#define EXC_INST_MISALIGNED 0
+#define EXC_INST_ACCESS 1
+#define EXC_BREAKPOINT 3
+#define EXC_LOAD_ACCESS 5
+#define EXC_STORE_ACCESS 7
+#define EXC_SYSCALL 8
+#define EXC_INST_PAGE_FAULT 12
+#define EXC_LOAD_PAGE_FAULT 13
+#define EXC_STORE_PAGE_FAULT 15
/* status CSR bits */
-#define SSTATUS_SUM (1 << 18)
-#define SSTATUS_SPP (1 << 8)
+#define SSTATUS_SUM (1 << 18)
+#define SSTATUS_SPP (1 << 8)
/* directly lifted from Linux:/arch/riscv/include/asm/asm.h:9-13 */
#if defined(__ASSEMBLY__)
@@ -48,16 +47,16 @@
#define __ASM_STR(x) #x
#endif
-#define csr_read(csr, res)\
- __asm__ volatile ("csrr %0, " __ASM_STR(csr) : "=r" (res) : : "memory")
+#define csr_read(csr, res) \
+ __asm__ volatile("csrr %0, " __ASM_STR(csr) : "=r"(res) : : "memory")
-#define csr_write(csr, val)\
- __asm__ volatile ("csrw " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+#define csr_write(csr, val) \
+ __asm__ volatile("csrw " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
-#define csr_set(csr, val)\
- __asm__ volatile ("csrs " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+#define csr_set(csr, val) \
+ __asm__ volatile("csrs " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
-#define csr_clear(csr, val)\
- __asm__ volatile ("csrc " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+#define csr_clear(csr, val) \
+ __asm__ volatile("csrc " __ASM_STR(csr) ", %0" : : "r"(val) : "memory")
#endif /* APOS_CSR_H */
diff --git a/arch/riscv64/include/pages.h b/arch/riscv64/include/pages.h
index 643d3b4..20dab3d 100644
--- a/arch/riscv64/include/pages.h
+++ b/arch/riscv64/include/pages.h
@@ -1,10 +1,10 @@
#ifndef APOS_RISCV_PAGES_H
#define APOS_RISCV_PAGES_H
-#define MM_KPAGE MM_O0
-#define MM_MPAGE MM_O1
-#define MM_GPAGE MM_O2
-#define MM_TPAGE MM_O3
+#define MM_KPAGE MM_O0
+#define MM_MPAGE MM_O1
+#define MM_GPAGE MM_O2
+#define MM_TPAGE MM_O3
#define MM_KPAGE_SIZE SZ_4K
#define MM_MPAGE_SIZE SZ_2M
diff --git a/arch/riscv64/include/sbi.h b/arch/riscv64/include/sbi.h
index 609849d..e6ceb92 100644
--- a/arch/riscv64/include/sbi.h
+++ b/arch/riscv64/include/sbi.h
@@ -5,8 +5,9 @@ struct sbiret {
long value;
};
-struct sbiret sbi_ecall(int ext, int fid,
- unsigned long arg0, unsigned long arg1, unsigned long arg2,
- unsigned long arg3, unsigned long arg4, unsigned long arg5);
+struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
+ unsigned long arg1, unsigned long arg2,
+ unsigned long arg3, unsigned long arg4,
+ unsigned long arg5);
#endif /* APOS_RISCV_SBI_H */
diff --git a/arch/riscv64/init/init.c b/arch/riscv64/init/init.c
index 94f9777..f844dbb 100644
--- a/arch/riscv64/init/init.c
+++ b/arch/riscv64/init/init.c
@@ -20,16 +20,18 @@ void init_bootmem()
size_t flags = VM_V | VM_X | VM_R | VM_W;
extern char *__init_start;
- root_branch = (struct init_vmem *)align_down((size_t)&__init_start - SZ_4K, SZ_4K);
+ root_branch = (struct init_vmem *)align_down(
+ (size_t)&__init_start - SZ_4K, SZ_4K);
/* direct mapping (temp) */
- for(size_t i = 0; i < CSTACK_PAGE; ++i)
- root_branch->leaf[i] = (int*)to_pte(SZ_1G * i, flags);
+ for (size_t i = 0; i < CSTACK_PAGE; ++i)
+ root_branch->leaf[i] = (int *)to_pte(SZ_1G * i, flags);
/* kernel (also sort of direct mapping) */
flags |= VM_G;
- for(size_t i = KSTART_PAGE; i < IO_PAGE; ++i)
- root_branch->leaf[i] = (int *)to_pte(RAM_BASE + SZ_1G * (i - 256), flags);
+ for (size_t i = KSTART_PAGE; i < IO_PAGE; ++i)
+ root_branch->leaf[i] =
+ (int *)to_pte(RAM_BASE + SZ_1G * (i - 256), flags);
/* kernel IO, map to 0 for now, will be updated in the future */
root_branch->leaf[IO_PAGE] = (int *)to_pte(0, flags);
@@ -45,17 +47,17 @@ void move_kernel()
size_t sz = (size_t)&__kernel_size;
char *src = (char *)&__init_end;
char *dst = (char *)VM_KERN;
- for(size_t i = 0; i < sz; ++i)
+ for (size_t i = 0; i < sz; ++i)
dst[i] = src[i];
}
-#define __va_reg(reg)\
-{\
- vm_t reg = 0;\
- __asm__("mv %0, " QUOTE(reg) : "=r" (reg) :: );\
- reg = (vm_t)__va(reg);\
- __asm__("mv " QUOTE(reg) ", %0" :: "rK" (reg) : );\
-}
+#define __va_reg(reg) \
+ { \
+ vm_t reg = 0; \
+ __asm__("mv %0, " QUOTE(reg) : "=r"(reg)::); \
+ reg = (vm_t)__va(reg); \
+ __asm__("mv " QUOTE(reg) ", %0" ::"rK"(reg) :); \
+ }
void init(void *fdt)
{
diff --git a/arch/riscv64/kernel/irq.c b/arch/riscv64/kernel/irq.c
index a88288f..27e0bd0 100644
--- a/arch/riscv64/kernel/irq.c
+++ b/arch/riscv64/kernel/irq.c
@@ -7,7 +7,7 @@ void init_irq(void *fdt)
{
UNUSED(fdt);
csr_write(CSR_STVEC, &handle_irq);
-
+
long s = 0;
csr_read(CSR_SIE, s);
info("CSR_SIE: %lx\n", s);
@@ -15,7 +15,8 @@ void init_irq(void *fdt)
__aligned(4) void handle_irq()
{
- while(1);
+ while (1)
+ ;
}
/* very simple for now */
diff --git a/arch/riscv64/kernel/pmem.c b/arch/riscv64/kernel/pmem.c
index 404329c..fc3fa40 100644
--- a/arch/riscv64/kernel/pmem.c
+++ b/arch/riscv64/kernel/pmem.c
@@ -1,6 +1,7 @@
#include <arch/pmem.h>
-stat_t stat_pmem_conf(void *fdt, size_t *max_order, size_t *base_bits, size_t bits[NUM_ORDERS])
+stat_t stat_pmem_conf(void *fdt, size_t *max_order, size_t *base_bits,
+ size_t bits[NUM_ORDERS])
{
UNUSED(fdt);
@@ -8,7 +9,7 @@ stat_t stat_pmem_conf(void *fdt, size_t *max_order, size_t *base_bits, size_t bi
*max_order = 2;
*base_bits = 12;
/* we can assume bits[] is zeroed out beforehand */
- for(size_t i = 0; i <= *max_order; ++i)
+ for (size_t i = 0; i <= *max_order; ++i)
bits[i] = 9;
return OK;
diff --git a/arch/riscv64/kernel/proc.c b/arch/riscv64/kernel/proc.c
index e2cbcea..ef8f24e 100644
--- a/arch/riscv64/kernel/proc.c
+++ b/arch/riscv64/kernel/proc.c
@@ -5,8 +5,8 @@
stat_t jump_to_userspace(struct tcb *t, int argc, char **argv)
{
csr_write(CSR_SEPC, t->entry);
- __asm__ volatile ("mv sp, %0\n" : "=r" (t->proc_stack) :: "memory");
- __asm__ volatile ("sret\n" ::: "memory");
+ __asm__ volatile("mv sp, %0\n" : "=r"(t->proc_stack)::"memory");
+ __asm__ volatile("sret\n" ::: "memory");
/* we should never reach this */
return ERR_ADDR;
}
diff --git a/arch/riscv64/kernel/vmem.c b/arch/riscv64/kernel/vmem.c
index cd822ae..46ddf29 100644
--- a/arch/riscv64/kernel/vmem.c
+++ b/arch/riscv64/kernel/vmem.c
@@ -7,30 +7,30 @@
#include <pages.h>
#include <csr.h>
-#define pte_ppn(pte) (((pm_t)(pte)) >> 10)
-#define pte_flags(pte) (((pm_t)(pte)) & 0xff)
-#define to_pte(p, f) ((pm_to_pnum(p) << 10) | (f))
-#define pte_addr(pte) __va(pnum_to_paddr(pte_ppn(pte)))
-#define pte_paddr(pte) (pnum_to_paddr(pte_ppn(pte)))
+#define pte_ppn(pte) (((pm_t)(pte)) >> 10)
+#define pte_flags(pte) (((pm_t)(pte)) & 0xff)
+#define to_pte(p, f) ((pm_to_pnum(p) << 10) | (f))
+#define pte_addr(pte) __va(pnum_to_paddr(pte_ppn(pte)))
+#define pte_paddr(pte) (pnum_to_paddr(pte_ppn(pte)))
#define vm_to_index(a, o) (pm_to_index(a, o))
-#define is_active(pte) (pte_flags(pte) & VM_V)
-#define is_leaf(pte) (is_active(pte) && (pte_flags(pte) & ~VM_V))
-#define is_branch(pte) (is_active(pte) && !(pte_flags(pte) & ~VM_V))
+#define is_active(pte) (pte_flags(pte) & VM_V)
+#define is_leaf(pte) (is_active(pte) && (pte_flags(pte) & ~VM_V))
+#define is_branch(pte) (is_active(pte) && !(pte_flags(pte) & ~VM_V))
static pm_t *__find_vmem(struct vm_branch *b, vm_t v, enum mm_order *o)
{
enum mm_order top = __mm_max_order;
- if(o)
+ if (o)
*o = MM_O0;
do {
size_t idx = vm_to_index(v, top);
pm_t pte = (pm_t)b->leaf[idx];
- if(!pte)
+ if (!pte)
return 0;
- if(is_leaf(pte)){
- if(o)
+ if (is_leaf(pte)) {
+ if (o)
*o = top;
return (pm_t *)&b->leaf[idx];
@@ -42,10 +42,11 @@ static pm_t *__find_vmem(struct vm_branch *b, vm_t v, enum mm_order *o)
return 0;
}
-stat_t mod_vpage(struct vm_branch *branch, vm_t vaddr, pm_t paddr, vmflags_t flags)
+stat_t mod_vpage(struct vm_branch *branch, vm_t vaddr, pm_t paddr,
+ vmflags_t flags)
{
pm_t *pte = __find_vmem(branch, vaddr, 0);
- if(pte){
+ if (pte) {
*pte = to_pte((pm_t)__pa(paddr), vp_flags(flags));
return OK;
}
@@ -56,14 +57,14 @@ stat_t mod_vpage(struct vm_branch *branch, vm_t vaddr, pm_t paddr, vmflags_t fla
/* huh, should probably add status flags etc. to all my API functions. Damn, I'm
* lazy. */
stat_t stat_vpage(struct vm_branch *branch, vm_t vaddr, pm_t *paddr,
- enum mm_order *order, vmflags_t *flags)
+ enum mm_order *order, vmflags_t *flags)
{
pm_t *pte = __find_vmem(branch, vaddr, order);
- if(pte){
- if(paddr)
+ if (pte) {
+ if (paddr)
*paddr = (pm_t)pte_addr(*pte);
- if(flags)
+ if (flags)
*flags = pte_flags(*pte);
return OK;
@@ -81,19 +82,20 @@ static struct vm_branch *__create_leaf()
static void __destroy_branch(struct vm_branch *b)
{
- if(!b)
+ if (!b)
return;
- for(size_t i = 0; i < BASE_PAGE_SIZE / sizeof(pm_t); ++i){
- if(is_branch(b->leaf[i]))
- __destroy_branch((struct vm_branch *)pte_addr(b->leaf[i]));
+ for (size_t i = 0; i < BASE_PAGE_SIZE / sizeof(pm_t); ++i) {
+ if (is_branch(b->leaf[i]))
+ __destroy_branch(
+ (struct vm_branch *)pte_addr(b->leaf[i]));
free_page(MM_KPAGE, (pm_t)pte_addr(b->leaf[i]));
}
}
-stat_t map_vpage(struct vm_branch *branch,
- pm_t paddr, vm_t vaddr, vmflags_t flags, enum mm_order order)
+stat_t map_vpage(struct vm_branch *branch, pm_t paddr, vm_t vaddr,
+ vmflags_t flags, enum mm_order order)
{
enum mm_order top = __mm_max_order;
while (top != order) {
@@ -102,24 +104,24 @@ stat_t map_vpage(struct vm_branch *branch,
if (!branch->leaf[idx])
branch->leaf[idx] = __create_leaf();
-
branch = (struct vm_branch *)pte_addr(branch->leaf[idx]);
top--;
}
size_t idx = vm_to_index(vaddr, top);
- if (is_branch(branch->leaf[idx])) /* something has gone terribly wrong? */
+ if (is_branch(
+ branch->leaf[idx])) /* something has gone terribly wrong? */
__destroy_branch(branch->leaf[idx]);
- branch->leaf[idx] = (struct vm_branch *)to_pte((pm_t)__pa(paddr), vp_flags(flags));
+ branch->leaf[idx] =
+ (struct vm_branch *)to_pte((pm_t)__pa(paddr), vp_flags(flags));
return OK;
}
stat_t unmap_vpage(struct vm_branch *branch, vm_t vaddr)
{
-
pm_t *pte = __find_vmem(branch, vaddr, 0);
- if(pte){
+ if (pte) {
*pte = 0;
return OK;
}
@@ -129,24 +131,27 @@ stat_t unmap_vpage(struct vm_branch *branch, vm_t vaddr)
void flush_tlb()
{
- __asm__ volatile ("sfence.vma %0\n" :: "r" (cpu_id()) : "memory");
+ __asm__ volatile("sfence.vma %0\n" ::"r"(cpu_id()) : "memory");
}
void flush_tlb_all()
{
- __asm__ volatile ("sfence.vma\n" ::: "memory");
+ __asm__ volatile("sfence.vma\n" ::: "memory");
}
static void __start_vmem(struct vm_branch *branch, enum mm_mode m)
{
branch = (struct vm_branch *)__pa(branch);
- if(m == Sv32)
- csr_write(CSR_SATP, SATP_MODE_Sv32 | pm_to_pnum((pm_t)(branch)));
+ if (m == Sv32)
+ csr_write(CSR_SATP,
+ SATP_MODE_Sv32 | pm_to_pnum((pm_t)(branch)));
else if (m == Sv39)
- csr_write(CSR_SATP, SATP_MODE_Sv39 | pm_to_pnum((pm_t)(branch)));
+ csr_write(CSR_SATP,
+ SATP_MODE_Sv39 | pm_to_pnum((pm_t)(branch)));
else
- csr_write(CSR_SATP, SATP_MODE_Sv48 | pm_to_pnum((pm_t)(branch)));
+ csr_write(CSR_SATP,
+ SATP_MODE_Sv48 | pm_to_pnum((pm_t)(branch)));
flush_tlb_all();
/* Sv57 && Sv64 in the future? */
@@ -167,8 +172,9 @@ struct vm_branch *init_vmem(void *fdt)
void populate_root_branch(struct vm_branch *b)
{
size_t flags = VM_V | VM_R | VM_W | VM_X | VM_G;
- for(size_t i = KSTART_PAGE; i < IO_PAGE; ++i)
- b->leaf[i] = (struct vm_branch *)to_pte(RAM_BASE + SZ_1G * (i - KSTART_PAGE), flags);
+ for (size_t i = KSTART_PAGE; i < IO_PAGE; ++i)
+ b->leaf[i] = (struct vm_branch *)to_pte(
+ RAM_BASE + SZ_1G * (i - KSTART_PAGE), flags);
/* map kernel IO to zero for now, this will be overridden later
* (if at all) */
@@ -180,7 +186,8 @@ vm_t setup_kernel_io(struct vm_branch *b, vm_t paddr)
{
/* assume Sv39 for now */
pm_t gigapage = paddr / MM_GPAGE_SIZE;
- b->leaf[IO_PAGE] = (struct vm_branch *)to_pte(gigapage, VM_V | VM_R | VM_W);
+ b->leaf[IO_PAGE] =
+ (struct vm_branch *)to_pte(gigapage, VM_V | VM_R | VM_W);
return -SZ_1G + paddr - (gigapage * MM_GPAGE_SIZE);
}
#endif