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| author | Kimplul <kimi.h.kuparinen@gmail.com> | 2024-05-10 13:55:09 +0300 |
|---|---|---|
| committer | Kimplul <kimi.h.kuparinen@gmail.com> | 2024-05-10 13:55:09 +0300 |
| commit | 4e3d119ed840b547cf76354e90f292c44c9fe162 (patch) | |
| tree | b0004397d69859d0cd3bb149f33a01222c14bf37 /arch | |
| parent | 58fdcec91d1cdd0e39d723884e0fef1f33d1efc5 (diff) | |
| download | kmi-4e3d119ed840b547cf76354e90f292c44c9fe162.tar.gz kmi-4e3d119ed840b547cf76354e90f292c44c9fe162.zip | |
update formatting config
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv64/conf/init.c | 2 | ||||
| -rw-r--r-- | arch/riscv64/kernel/csr.h | 15 | ||||
| -rw-r--r-- | arch/riscv64/kernel/vmem.c | 2 |
3 files changed, 11 insertions, 8 deletions
diff --git a/arch/riscv64/conf/init.c b/arch/riscv64/conf/init.c index f9dfca3..6783283 100644 --- a/arch/riscv64/conf/init.c +++ b/arch/riscv64/conf/init.c @@ -277,7 +277,7 @@ void callback(long status, long tid, long d0, long d1, long d2, long d3) #define CSR_TIME "0xc01" #define csr_read(csr, \ - res) __asm__ volatile ("csrr %0, " csr : "=r" (res) :: "memory") + res) __asm__ volatile ("csrr %0, " csr : "=r" (res) :: "memory") #define CSR_CYCLE "0xc00" diff --git a/arch/riscv64/kernel/csr.h b/arch/riscv64/kernel/csr.h index 9a23127..9b7b78a 100644 --- a/arch/riscv64/kernel/csr.h +++ b/arch/riscv64/kernel/csr.h @@ -146,8 +146,9 @@ * @param csr Name of CSR. * @param val Value to be written. */ -#define csr_write(csr, val) \ - __asm__ volatile ("csrw " __ASM_STR(csr) ", %0" : : "r" (val) : "memory") +#define csr_write(csr, val) \ + __asm__ volatile ("csrw " __ASM_STR( \ + csr) ", %0" : : "r" (val) : "memory") /** * Set bits in CSR. @@ -155,8 +156,9 @@ * @param csr Name of CSR. * @param val Mask of bits to set. */ -#define csr_set(csr, val) \ - __asm__ volatile ("csrs " __ASM_STR(csr) ", %0" : : "r" (val) : "memory") +#define csr_set(csr, val) \ + __asm__ volatile ("csrs " __ASM_STR( \ + csr) ", %0" : : "r" (val) : "memory") /** * Clear bits in CSR. @@ -164,7 +166,8 @@ * @param csr Name of CSR. * @param val Mask of bits to clear. */ -#define csr_clear(csr, val) \ - __asm__ volatile ("csrc " __ASM_STR(csr) ", %0" : : "r" (val) : "memory") +#define csr_clear(csr, val) \ + __asm__ volatile ("csrc " __ASM_STR( \ + csr) ", %0" : : "r" (val) : "memory") #endif /* KMI_CSR_H */ diff --git a/arch/riscv64/kernel/vmem.c b/arch/riscv64/kernel/vmem.c index bc984e4..d00a6c9 100644 --- a/arch/riscv64/kernel/vmem.c +++ b/arch/riscv64/kernel/vmem.c @@ -73,7 +73,7 @@ * @param pte Page table entry. * @return \c 0 if entry is not active, non-zero otherwise. */ -#define is_active(pte) (pte_flags(pte) & VM_V) +#define is_active(pte) (pte_flags(pte) &VM_V) /** * Check if page table entry is a leaf. |