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authorKimplul <kimi.h.kuparinen@gmail.com>2022-05-23 23:00:55 +0300
committerKimplul <kimi.h.kuparinen@gmail.com>2022-05-23 23:00:55 +0300
commit12be40e22aae582cca9abbd151031edaab800cae (patch)
tree9a672c52b26357ba4c5ce07ca93b2d203594f36a /arch/riscv64
parentb28fd7d9121c63ae6a1737d890414ef8cce177e0 (diff)
downloadkmi-12be40e22aae582cca9abbd151031edaab800cae.tar.gz
kmi-12be40e22aae582cca9abbd151031edaab800cae.zip
start writing documentation
Diffstat (limited to 'arch/riscv64')
-rw-r--r--arch/riscv64/include/vmem.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/riscv64/include/vmem.h b/arch/riscv64/include/vmem.h
index a557513..fc3df00 100644
--- a/arch/riscv64/include/vmem.h
+++ b/arch/riscv64/include/vmem.h
@@ -11,28 +11,60 @@
#include <apos/types.h>
#include <apos/attrs.h>
+/**
+ * Number of entries in one page table, depends on if we're running riscv32 or
+ * riscv64.
+ */
#if __riscv_xlen == 64
+ /** When running riscv64, each page table has 512 8byte entries. */
#define RISCV_NUM_LEAVES 512
#else
+ /** When running riscv32, each page table has 1024 4byte entries. */
#define RISCV_NUM_LEAVES 1024
#endif
+/** Page is active. */
#define VM_V (1 << 0)
+
+/** Page is readable. */
#define VM_R (1 << 1)
+
+/** Page is writable. */
#define VM_W (1 << 2)
+
+/** Page is executable. */
#define VM_X (1 << 3)
+
+/** Page is user-accessible. */
#define VM_U (1 << 4)
+
+/** Page is global. */
#define VM_G (1 << 5)
+
+/** Page has been accessed. */
#define VM_A (1 << 6)
+
+/** Page is dirty. */
#define VM_D (1 << 7)
+/** Memory mode of cpu. Currently only Sv39 is supported. */
enum mm_mode {
+ /** 48bit effective addresses on 64bit systems. */
Sv48,
+ /** 39bit effective addresses on 64bit systems. */
Sv39,
+ /** 32bit effective addresses on 32bit systems. */
Sv32,
};
+/**
+ * Virtual memory.
+ *
+ * On riscv, all page tables are luckily identical, so we can
+ * use this without much trickery.
+ */
struct vmem {
+ /** RISCV_NUM_LEAVES pointers to other page tables. */
struct vmem *leaf[RISCV_NUM_LEAVES];
};