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| author | Kimplul <kimi.h.kuparinen@gmail.com> | 2022-05-23 21:31:48 +0300 |
|---|---|---|
| committer | Kimplul <kimi.h.kuparinen@gmail.com> | 2022-05-23 21:31:48 +0300 |
| commit | 960330c5d843d1aa96aa191fc27f72da563293ea (patch) | |
| tree | 2d7ae69d40fa76aeb4f29d3911b7fc2f9341765d /arch/riscv64/kernel/regs.h | |
| parent | b096078c282af7233062ba242a213e6f5574cfb1 (diff) | |
| download | kmi-960330c5d843d1aa96aa191fc27f72da563293ea.tar.gz kmi-960330c5d843d1aa96aa191fc27f72da563293ea.zip | |
new include structure, make parse easier for doxy
Diffstat (limited to 'arch/riscv64/kernel/regs.h')
| -rw-r--r-- | arch/riscv64/kernel/regs.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/riscv64/kernel/regs.h b/arch/riscv64/kernel/regs.h new file mode 100644 index 0000000..511934e --- /dev/null +++ b/arch/riscv64/kernel/regs.h @@ -0,0 +1,18 @@ +#ifndef APOS_RISCV_REGS_H +#define APOS_RISCV_REGS_H + +/** + * @file regs.h + * riscv64 registers, currently only base extension integer regs. Used to \ref + * _save_context. Used in \ref arch/riscv64/gen/asm-offsets.c to generate a list + * of offsets usable from assembly. + * + * @todo Implement sacing floating point, vector, etc. registers. + */ + +struct riscv_regs { + long ra, sp, gp, tp, t0, t1, t2, s0, s1, a0, a1, a2, a3, a4, a5, a6, a7, + s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, t3, t4, t5, t6; +}; + +#endif /* APOS_RISCV_REGS_H */ |