misc fixes

+ Align kernel to 2MiB boundary in u-boot

+ Optimize alignment functions a little bit, should still have to check
  on real hardware but 'feels' more clean

+ Add early boot debugging

+ Put extra cores we aren't ready to account for to sleep if/when they
  boot.

+ Make BASE_PAGE_SIZE constant on riscv64/32, helps the compiler with
  some alignment checks among other things.

2 files changed, 17 insertions, 2 deletions

diff --git a/arch/riscv64/include/mem.h b/arch/riscv64/include/mem.h
new file mode 100644
index 0000000..410a428
--- /dev/null
+++ b/arch/riscv64/include/mem.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: copyleft-next-0.3.1 */
+/* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */
+
+#ifndef KMI_RISCV_MEM_H
+#define KMI_RISCV_MEM_H
+/**
+ * @file pmem.h
+ * riscv64-specific general memory stuff.
+ */
+
+/** Base page size is always 4K, use a constant for better optimizations here
+ * and there */
+#define BASE_PAGE_SIZE 4096
+
+#endif /* KMI_RISCV_MEM_H */
diff --git a/arch/riscv64/include/pmem.h b/arch/riscv64/include/pmem.h
index 7101757..071c3b5 100644
--- a/arch/riscv64/include/pmem.h
+++ b/arch/riscv64/include/pmem.h
@@ -5,7 +5,7 @@
 #define KMI_RISCV_PMEM_H
 /**
  * @file pmem.h
- * riscv64-specific physical memory, currently empty but kept around for
- * forwards compatibility.
+ * riscv64-specific physical memory stuff.
  */
+
 #endif /* KMI_RISCV_PMEM_H */