Allow building with clang

+ Release mode is sort of broken, as lto doesn't work with linker
  relaxation and turning the relaxation off causes issues with the jump
  from init to kernel (as I've currently implemented it, could probably
  be fixed with a manual jump from assembly, I'll add it to my TODO
  list)

6 files changed, 130 insertions, 0 deletions

diff --git a/arch/riscv64/include/csr.h b/arch/riscv64/include/csr.h
new file mode 100644
index 0000000..52db9c1
--- /dev/null
+++ b/arch/riscv64/include/csr.h
@@ -0,0 +1,63 @@
+#ifndef APOS_CSR_H
+#define APOS_CSR_H
+
+#include <apos/utils.h>
+
+#define SATP_MODE_Sv32	0x80000000
+#define SATP_MODE_Sv39	0x8000000000000000
+#define SATP_MODE_Sv48	0x9000000000000000
+
+
+/* supervisor CSR registers */
+#define CSR_SSTATUS	0x100
+#define CSR_SIE		0x104
+#define CSR_STVEC	0x105
+#define CSR_SCOUNTEREN	0x106
+
+#define CSR_SENVCFG	0x10A
+
+#define CSR_SSCRATCH	0x140
+#define CSR_SEPC	0x141
+#define CSR_SCAUSE	0x142
+#define CSR_STVAL	0x143
+#define CSR_SIP		0x144
+
+#define CSR_SATP	0x180
+
+#define CSR_SCONTEXT	0x5A8
+
+/* Exception causes */
+#define EXC_INST_MISALIGNED	0
+#define EXC_INST_ACCESS		1
+#define EXC_BREAKPOINT		3
+#define EXC_LOAD_ACCESS		5
+#define EXC_STORE_ACCESS	7
+#define EXC_SYSCALL		8
+#define EXC_INST_PAGE_FAULT	12
+#define EXC_LOAD_PAGE_FAULT	13
+#define EXC_STORE_PAGE_FAULT	15
+
+/* status CSR bits */
+#define SSTATUS_SUM		(1 << 18)
+#define SSTATUS_SPP		(1 << 8)
+
+/* directly lifted from Linux:/arch/riscv/include/asm/asm.h:9-13 */
+#ifdef __ASSEMBLY__
+#define __ASM_STR(x) x
+#else
+#define __ASM_STR(x) #x
+#endif
+
+#define csr_read(csr, res)\
+	__asm__ volatile ("csrr %0, " __ASM_STR(csr) : "=r" (res) : : "memory")
+
+#define csr_write(csr, val)\
+	__asm__ volatile ("csrw " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+
+#define csr_set(csr, val)\
+	__asm__ volatile ("csrs " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+
+#define csr_clear(csr, val)\
+	__asm__ volatile ("csrc " __ASM_STR(csr) ", %0" : : "r" (val) : "memory")
+
+#endif /* APOS_CSR_H */
diff --git a/arch/riscv64/include/lock.h b/arch/riscv64/include/lock.h
new file mode 100644
index 0000000..4f71344
--- /dev/null
+++ b/arch/riscv64/include/lock.h
@@ -0,0 +1 @@
+#define optional_pause()
diff --git a/arch/riscv64/include/pages.h b/arch/riscv64/include/pages.h
new file mode 100644
index 0000000..362499a
--- /dev/null
+++ b/arch/riscv64/include/pages.h
@@ -0,0 +1,18 @@
+#ifndef APOS_RISCV_PAGES_H
+#define APOS_RISCV_PAGES_H
+
+#include <apos/types.h>
+
+#define MM_KPAGE MM_O0
+#define MM_MPAGE MM_O1
+#define MM_GPAGE MM_O2
+#define MM_TPAGE MM_O3
+
+#define MM_KPAGE_SIZE SZ_4K
+#define MM_MPAGE_SIZE SZ_2M
+#define MM_GPAGE_SIZE SZ_1G
+#define MM_TPAGE_SIZE SZ_512G
+
+typedef uint64_t pm_t;
+
+#endif /* APOS_RISCV_PAGES_H */
diff --git a/arch/riscv64/include/sbi.h b/arch/riscv64/include/sbi.h
new file mode 100644
index 0000000..609849d
--- /dev/null
+++ b/arch/riscv64/include/sbi.h
@@ -0,0 +1,12 @@
+#ifndef APOS_RISCV_SBI_H
+
+struct sbiret {
+	long error;
+	long value;
+};
+
+struct sbiret sbi_ecall(int ext, int fid,
+		unsigned long arg0, unsigned long arg1, unsigned long arg2,
+		unsigned long arg3, unsigned long arg4, unsigned long arg5);
+
+#endif /* APOS_RISCV_SBI_H */
diff --git a/arch/riscv64/include/tcb.h b/arch/riscv64/include/tcb.h
new file mode 100644
index 0000000..d1e0717
--- /dev/null
+++ b/arch/riscv64/include/tcb.h
@@ -0,0 +1,9 @@
+#ifndef ARCH_RISCV_TCB_H
+#define ARCH_RISCV_TCB_H
+
+struct arch_tcbd {
+	/* empty for now, but should probably be filled with stuff like register
+	 * saving of something */
+};
+
+#endif /* ARCH_RISCV_TCB_H */
diff --git a/arch/riscv64/include/vmem.h b/arch/riscv64/include/vmem.h
new file mode 100644
index 0000000..228b24b
--- /dev/null
+++ b/arch/riscv64/include/vmem.h
@@ -0,0 +1,27 @@
+#ifndef APOS_RISCV_VMAP_H
+#define APOS_RISCV_VMAP_H
+
+#include <apos/types.h>
+#include <apos/attrs.h>
+
+#define VM_V (1 << 0)
+#define VM_R (1 << 1)
+#define VM_W (1 << 2)
+#define VM_X (1 << 3)
+#define VM_U (1 << 4)
+#define VM_G (1 << 5)
+#define VM_A (1 << 6)
+#define VM_D (1 << 7)
+
+enum mm_mode {
+	Sv48,
+	Sv39,
+	Sv32,
+};
+
+typedef size_t vm_t;
+struct __packed vm_branch {
+	struct vm_branch *leaf[512];
+};
+
+#endif /* APOS_RISCV_VMAP_H */