aboutsummaryrefslogtreecommitdiff
path: root/tests/simple_riscv32
diff options
context:
space:
mode:
Diffstat (limited to 'tests/simple_riscv32')
-rw-r--r--tests/simple_riscv32/s.asm16
-rw-r--r--tests/simple_riscv32/sim.c35
-rw-r--r--tests/simple_riscv32/source.mk6
3 files changed, 57 insertions, 0 deletions
diff --git a/tests/simple_riscv32/s.asm b/tests/simple_riscv32/s.asm
new file mode 100644
index 0000000..d423dd9
--- /dev/null
+++ b/tests/simple_riscv32/s.asm
@@ -0,0 +1,16 @@
+.global _start
+_start:
+/* sum from 0 to 1000000 */
+
+li a0, 0 /* index */
+li a1, 1000000 /* top */
+li a2, 0 /* sum */
+
+top:
+beq a0, a1, done
+add a2, a2, a0
+addi a0, a0, 1
+j top
+
+done:
+ebreak
diff --git a/tests/simple_riscv32/sim.c b/tests/simple_riscv32/sim.c
new file mode 100644
index 0000000..df2127d
--- /dev/null
+++ b/tests/simple_riscv32/sim.c
@@ -0,0 +1,35 @@
+#include <assert.h>
+
+#include <gran/root.h>
+#include <gran/mem/simple_mem.h>
+#include <gran/cpu/riscv/simple_riscv32.h>
+
+unsigned char simple_sum[] = {
+ 0x13, 0x05, 0x00, 0x00, 0xb7, 0x45, 0x0f, 0x00, 0x93, 0x85, 0x05, 0x24,
+ 0x13, 0x06, 0x00, 0x00, 0x63, 0x08, 0xb5, 0x00, 0x33, 0x06, 0xa6, 0x00,
+ 0x13, 0x05, 0x15, 0x00, 0x6f, 0xf0, 0x5f, 0xff, 0x73, 0x00, 0x10, 0x00
+};
+
+unsigned int simple_sum_len = 36;
+
+int main()
+{
+ const size_t size = 100000;
+ struct component *imem = create_simple_mem(size);
+
+ /* This works for simple memory, but feels kind of hacky */
+ init_simple_mem(imem, 0, simple_sum_len, simple_sum);
+
+ struct component *dmem = create_simple_mem(size);
+ struct component *rv32 = create_simple_riscv32(0, imem, dmem);
+
+ struct clock_domain *clk = create_clock_domain(NS(1));
+ clock_domain_add(clk, rv32);
+
+ struct gran_root *root = create_root();
+ root_add_clock(root, clk);
+
+ assert(root_run(root) == OK);
+
+ destroy_root(root);
+}
diff --git a/tests/simple_riscv32/source.mk b/tests/simple_riscv32/source.mk
new file mode 100644
index 0000000..736c111
--- /dev/null
+++ b/tests/simple_riscv32/source.mk
@@ -0,0 +1,6 @@
+RV32_TEST_OBJ != ./scripts/gen-deps --sources "tests/simple_riscv32/sim.c"
+
+TEST_PROGS += build/tests/simple_riscv32/sim
+
+build/tests/simple_riscv32/sim: $(RV32_TEST_OBJ) $(TEST_OBJS) $(OBJS)
+ $(COMPILE) $(RV32_TEST_OBJ) $(TEST_OBJS) $(OBJS) -o $@