From f4afcfa58eb90d14abd55d79640ecda13b23dc21 Mon Sep 17 00:00:00 2001 From: Kimplul Date: Sun, 27 Sep 2026 22:30:41 +0300 Subject: implement circular router + Not great latency, but has a fairly high fmax and low resource usage on my FPGA, so go with this for now. Likely better suited for data path, unsure what I'll do for the control path. --- tb/Makefile | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'tb/Makefile') diff --git a/tb/Makefile b/tb/Makefile index f67e6af..9f51302 100644 --- a/tb/Makefile +++ b/tb/Makefile @@ -1,4 +1,4 @@ -all: rv2insn sched arb ttarv32 +all: rv2insn sched arb ttarv32 router .PHONY: sched sched: sched_tb.sv ../src/sched.sv ../src/common.svh @@ -18,6 +18,11 @@ arb: arb_tb.sv ../src/arb.sv verilator --Mdir arb_objdir --assert --trace --binary -I../src arb_tb.sv ./arb_objdir/Varb_tb +.PHONY: router +router: router_tb.sv ../src/router.sv + verilator --Mdir router_objdir --assert --trace --binary -I../src router_tb.sv + ./router_objdir/Vrouter_tb + .PHONY: ttarv32 ttarv32: ttarv32_tb.sv ../src/ttarv32.sv ../src/rv2insn.sv ../src/sched.sv ../src/common.svh riscv32-unknown-elf-gcc -ffreestanding -nostdlib -march=rv32i -mabi=ilp32 \ -- cgit v1.3