From ea5ebe0809fb31b9f125ac0689f706cc5f3f078f Mon Sep 17 00:00:00 2001 From: Kimplul Date: Sun, 30 Apr 2023 17:06:02 +0300 Subject: rename to kmi --- arch/riscv64/asm/asm-offsets.c | 4 ++-- arch/riscv64/asm/source.mk | 6 +++--- arch/riscv64/conf/apos.its | 48 ------------------------------------------ arch/riscv64/conf/boot.cmd | 2 +- arch/riscv64/conf/init.c | 2 +- arch/riscv64/conf/kmi.its | 48 ++++++++++++++++++++++++++++++++++++++++++ arch/riscv64/conf/mkimage.sh | 8 +++---- arch/riscv64/config.h | 10 ++++----- arch/riscv64/include/arch.h | 6 +++--- arch/riscv64/include/cpu.h | 6 +++--- arch/riscv64/include/irq.h | 6 +++--- arch/riscv64/include/lock.h | 6 +++--- arch/riscv64/include/pmem.h | 6 +++--- arch/riscv64/include/proc.h | 6 +++--- arch/riscv64/include/timer.h | 6 +++--- arch/riscv64/include/types.h | 10 ++++----- arch/riscv64/include/vmem.h | 12 +++++------ arch/riscv64/init/init.c | 8 +++---- arch/riscv64/kernel/cpu.c | 4 ++-- arch/riscv64/kernel/csr.h | 6 +++--- arch/riscv64/kernel/irq.c | 4 ++-- arch/riscv64/kernel/main.c | 2 +- arch/riscv64/kernel/pages.h | 6 +++--- arch/riscv64/kernel/power.c | 2 +- arch/riscv64/kernel/proc.c | 6 +++--- arch/riscv64/kernel/regs.h | 6 +++--- arch/riscv64/kernel/sbi.h | 8 +++---- arch/riscv64/kernel/vmem.c | 10 ++++----- 28 files changed, 127 insertions(+), 127 deletions(-) delete mode 100644 arch/riscv64/conf/apos.its create mode 100644 arch/riscv64/conf/kmi.its (limited to 'arch') diff --git a/arch/riscv64/asm/asm-offsets.c b/arch/riscv64/asm/asm-offsets.c index 731dd4a..4bc1179 100644 --- a/arch/riscv64/asm/asm-offsets.c +++ b/arch/riscv64/asm/asm-offsets.c @@ -7,8 +7,8 @@ * _save_context. */ -#include -#include +#include +#include #include "../kernel/regs.h" /** diff --git a/arch/riscv64/asm/source.mk b/arch/riscv64/asm/source.mk index 87bcf24..b9a64bc 100644 --- a/arch/riscv64/asm/source.mk +++ b/arch/riscv64/asm/source.mk @@ -3,14 +3,14 @@ OFFSET_SOURCE := $(ARCH_SOURCE)/asm/asm-offsets.c $(OFFSET_HEADER): $(OFFSET_SOURCE) mkdir -p $$(dirname $(OFFSET_HEADER)) - echo "#ifndef APOS_ASM_OFFSETS_H" > $(OFFSET_HEADER) - echo "#define APOS_ASM_OFFSETS_H" >> $(OFFSET_HEADER) + echo "#ifndef KMI_ASM_OFFSETS_H" > $(OFFSET_HEADER) + echo "#define KMI_ASM_OFFSETS_H" >> $(OFFSET_HEADER) echo "/**" >> $(OFFSET_HEADER) echo " * @file asm-offsets.h" >> $(OFFSET_HEADER) echo " * This comment is to shut up warnings." >> $(OFFSET_HEADER) echo " */" >> $(OFFSET_HEADER) $(COMPILER) $(CFLAGS) $(INCLUDE_FLAGS) -S $(OFFSET_SOURCE) -o - |\ awk '($$1 == "#->") { print "#define " $$2 " " $$3 }' >> $(OFFSET_HEADER) - echo "#endif /* APOS_ASM_OFFSETS_H */" >> $(OFFSET_HEADER) + echo "#endif /* KMI_ASM_OFFSETS_H */" >> $(OFFSET_HEADER) CLEANUP += $(ARCH_SOURCE)/kernel/gen diff --git a/arch/riscv64/conf/apos.its b/arch/riscv64/conf/apos.its deleted file mode 100644 index 026fb45..0000000 --- a/arch/riscv64/conf/apos.its +++ /dev/null @@ -1,48 +0,0 @@ -/dts-v1/; - -/ { - description = "FUCK"; -#address-cells = <1>; - - images { - kernel { - description = "Garbaggio"; - data = /incbin/("../../../apos.bin"); - type = "kernel"; - arch = "riscv"; - os = "apos"; - compression = "none"; - load = <0x80240000>; - entry = <0x80240000>; - hash-1 { - algo = "sha1"; - }; - }; - - initrd { - description = "Gargabbio initrd"; - data = /incbin/("initrd"); - type = "ramdisk"; - arch = "riscv"; - os = "apos"; - compression = "none"; - load = <0x88300000>; - hash-1 { - algo = "sha1"; - }; - }; - }; - - configurations { - default = "config"; - - config { - description = "Default configuration"; - kernel = "kernel"; - ramdisk = "initrd"; - hash-1 { - algo = "sha1"; - }; - }; - }; -}; diff --git a/arch/riscv64/conf/boot.cmd b/arch/riscv64/conf/boot.cmd index a7517fd..47f395a 100644 --- a/arch/riscv64/conf/boot.cmd +++ b/arch/riscv64/conf/boot.cmd @@ -1,4 +1,4 @@ fdt move ${fdt_addr} ${fdt_addr_r} fdt addr ${fdt_addr_r} -load ${devtype} ${devnum} ${kernel_addr_r} apos.itb +load ${devtype} ${devnum} ${kernel_addr_r} kmi.itb bootm ${kernel_addr_r} ${kernel_addr_r} ${fdt_addr_r} diff --git a/arch/riscv64/conf/init.c b/arch/riscv64/conf/init.c index fb7c737..3a1a517 100644 --- a/arch/riscv64/conf/init.c +++ b/arch/riscv64/conf/init.c @@ -19,7 +19,7 @@ #include #include -#include "../../../include/apos/syscalls.h" +#include "../../../include/kmi/syscalls.h" struct sys_ret { long a0, a1, a2, a3, a4, a5; diff --git a/arch/riscv64/conf/kmi.its b/arch/riscv64/conf/kmi.its new file mode 100644 index 0000000..0494030 --- /dev/null +++ b/arch/riscv64/conf/kmi.its @@ -0,0 +1,48 @@ +/dts-v1/; + +/ { + description = "FUCK"; +#address-cells = <1>; + + images { + kernel { + description = "Garbaggio"; + data = /incbin/("../../../kmi.bin"); + type = "kernel"; + arch = "riscv"; + os = "kmi"; + compression = "none"; + load = <0x80240000>; + entry = <0x80240000>; + hash-1 { + algo = "sha1"; + }; + }; + + initrd { + description = "Gargabbio initrd"; + data = /incbin/("initrd"); + type = "ramdisk"; + arch = "riscv"; + os = "kmi"; + compression = "none"; + load = <0x88300000>; + hash-1 { + algo = "sha1"; + }; + }; + }; + + configurations { + default = "config"; + + config { + description = "Default configuration"; + kernel = "kernel"; + ramdisk = "initrd"; + hash-1 { + algo = "sha1"; + }; + }; + }; +}; diff --git a/arch/riscv64/conf/mkimage.sh b/arch/riscv64/conf/mkimage.sh index 086e0ce..badac4c 100755 --- a/arch/riscv64/conf/mkimage.sh +++ b/arch/riscv64/conf/mkimage.sh @@ -15,17 +15,17 @@ OFFSET=$(fdisk -l rootfs.img | awk '$1=="rootfs.img1" {print $2}') mount -o loop,offset=$((${SSIZE}*${OFFSET})) rootfs.img fs # not entirely pleased with this solution, although eventually I should probably -# move `run` out of the kernel repo and into some `aposos` repo with a runtime +# move `run` out of the kernel repo and into some `kmios` repo with a runtime # and proper initrd etc. so this is good enough for now -../rv${XLEN}/u-boot-apos/tools/mkimage -f arch/riscv${XLEN}/conf/apos.its fs/apos.itb -../rv${XLEN}/u-boot-apos/tools/mkimage -A riscv -O apos -T script \ +../rv${XLEN}/u-boot-kmi/tools/mkimage -f arch/riscv${XLEN}/conf/kmi.its fs/kmi.itb +../rv${XLEN}/u-boot-kmi/tools/mkimage -A riscv -O kmi -T script \ -d arch/riscv64/conf/boot.cmd fs/boot.scr umount -l fs qemu-system-riscv${XLEN} \ -machine virt \ - -kernel ../rv${XLEN}/u-boot-apos/u-boot \ + -kernel ../rv${XLEN}/u-boot-kmi/u-boot \ -bios ../rv${XLEN}/opensbi/build/platform/generic/firmware/fw_jump.elf \ -device virtio-blk-device,drive=hd0 \ -drive file=rootfs.img,format=raw,id=hd0 \ diff --git a/arch/riscv64/config.h b/arch/riscv64/config.h index b96dc3e..86f591a 100644 --- a/arch/riscv64/config.h +++ b/arch/riscv64/config.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_CONFIG_H -#define APOS_RISCV_CONFIG_H +#ifndef KMI_RISCV_CONFIG_H +#define KMI_RISCV_CONFIG_H /** * @file config.h @@ -18,7 +18,7 @@ * \todo Write more thorough documentation, maybe a separate .md file? */ -#include +#include /* --- START ARCH USER CONFIG VALUES --- */ /** Physical address to where the OS image will be loaded. */ @@ -90,7 +90,7 @@ */ #define TOP_PAGE_SIZE SZ_1G -/** Default Sv mode on rv64 in apos. */ +/** Default Sv mode on rv64 in kmi. */ #define DEFAULT_Sv_MODE Sv39 #else @@ -114,4 +114,4 @@ #define DEFAULT_Sv_MODE Sv32 #endif -#endif /* APOS_RISCV_CONFIG_H */ +#endif /* KMI_RISCV_CONFIG_H */ diff --git a/arch/riscv64/include/arch.h b/arch/riscv64/include/arch.h index 4d083e7..d30232c 100644 --- a/arch/riscv64/include/arch.h +++ b/arch/riscv64/include/arch.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_ARCH_H -#define APOS_RISCV_ARCH_H +#ifndef KMI_RISCV_ARCH_H +#define KMI_RISCV_ARCH_H /** * @file arch.h * riscv64 arch header, currently empty but kept around for forwards * compatibility. */ -#endif /* APOS_RISCV_ARCH_H */ +#endif /* KMI_RISCV_ARCH_H */ diff --git a/arch/riscv64/include/cpu.h b/arch/riscv64/include/cpu.h index 73d3d15..f8131ae 100644 --- a/arch/riscv64/include/cpu.h +++ b/arch/riscv64/include/cpu.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_CPU_H -#define APOS_RISCV_CPU_H +#ifndef KMI_RISCV_CPU_H +#define KMI_RISCV_CPU_H /** * @file cpu.h * riscv64 cpu header, currently empty but kept around for forwards * compatibility. */ -#endif /* APOS_RISCV_CPU_H */ +#endif /* KMI_RISCV_CPU_H */ diff --git a/arch/riscv64/include/irq.h b/arch/riscv64/include/irq.h index cba6b31..574b6d2 100644 --- a/arch/riscv64/include/irq.h +++ b/arch/riscv64/include/irq.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_IRQ_H -#define APOS_RISCV_IRQ_H +#ifndef KMI_RISCV_IRQ_H +#define KMI_RISCV_IRQ_H /** * @file irq.h * riscv64 irq header, currently empty but kept around for forwards * compatibility. */ -#endif /* APOS_RISCV_IRQ_H */ +#endif /* KMI_RISCV_IRQ_H */ diff --git a/arch/riscv64/include/lock.h b/arch/riscv64/include/lock.h index a85f72e..cbdad63 100644 --- a/arch/riscv64/include/lock.h +++ b/arch/riscv64/include/lock.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_LOCK_H -#define APOS_RISCV_LOCK_H +#ifndef KMI_RISCV_LOCK_H +#define KMI_RISCV_LOCK_H /** * @file lock.h * riscv64 implementation of arch-specific lock behaviour, currently only \ref @@ -15,4 +15,4 @@ */ #define optional_pause() -#endif /* APOS_RISCV_LOCK_H */ +#endif /* KMI_RISCV_LOCK_H */ diff --git a/arch/riscv64/include/pmem.h b/arch/riscv64/include/pmem.h index 1b1d55a..ae23ca5 100644 --- a/arch/riscv64/include/pmem.h +++ b/arch/riscv64/include/pmem.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_PMEM_H -#define APOS_RISCV_PMEM_H +#ifndef KMI_RISCV_PMEM_H +#define KMI_RISCV_PMEM_H /** * @file pmem.h * riscv64-specific physical memory, currently empty but kept around for * forwards compatibility. */ -#endif /* APOS_RISCV_PMEM_H */ +#endif /* KMI_RISCV_PMEM_H */ diff --git a/arch/riscv64/include/proc.h b/arch/riscv64/include/proc.h index 8b531ce..dac57ed 100644 --- a/arch/riscv64/include/proc.h +++ b/arch/riscv64/include/proc.h @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_PROC_H -#define APOS_RISCV_PROC_H +#ifndef KMI_RISCV_PROC_H +#define KMI_RISCV_PROC_H /** * @file proc.h * riscv64-specific process-related stuff. Currently empty. */ -#endif /* APOS_RISCV_PROC_H */ +#endif /* KMI_RISCV_PROC_H */ diff --git a/arch/riscv64/include/timer.h b/arch/riscv64/include/timer.h index 6299662..33e02f8 100644 --- a/arch/riscv64/include/timer.h +++ b/arch/riscv64/include/timer.h @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_TIMER_H -#define APOS_RISCV_TIMER_H +#ifndef KMI_RISCV_TIMER_H +#define KMI_RISCV_TIMER_H /** * @file timer.h * riscv64 timer header, currently empty but kept around for forwards * compatibility. */ -#endif /* APOS_RISCV_TIMER_H */ +#endif /* KMI_RISCV_TIMER_H */ diff --git a/arch/riscv64/include/types.h b/arch/riscv64/include/types.h index 2a6dcb5..bcf96c6 100644 --- a/arch/riscv64/include/types.h +++ b/arch/riscv64/include/types.h @@ -1,16 +1,16 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_TYPES_H -#define APOS_RISCV_TYPES_H +#ifndef KMI_RISCV_TYPES_H +#define KMI_RISCV_TYPES_H /** * @file types.h * riscv64 definitions of arch-specific data types, possibly made redundant by - * \ref include/apos/types.h but kept around just to be sure. + * \ref include/kmi/types.h but kept around just to be sure. */ -#include +#include /** Virtual memory address. */ typedef uintptr_t vm_t; @@ -18,4 +18,4 @@ typedef uintptr_t vm_t; /** Physical memory address. */ typedef uintptr_t pm_t; -#endif /* APOS_RISCV_TYPES_H */ +#endif /* KMI_RISCV_TYPES_H */ diff --git a/arch/riscv64/include/vmem.h b/arch/riscv64/include/vmem.h index 9945051..5defc5a 100644 --- a/arch/riscv64/include/vmem.h +++ b/arch/riscv64/include/vmem.h @@ -1,18 +1,18 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_VMAP_H -#define APOS_RISCV_VMAP_H +#ifndef KMI_RISCV_VMAP_H +#define KMI_RISCV_VMAP_H /** * @file vmem.h * riscv64 definitions of arch-specific virtual memory data types and macros. - * Very likely VM_* should be moved to \ref include/apos/vmem.h and made + * Very likely VM_* should be moved to \ref include/kmi/vmem.h and made * architecture-nonspecific, but works for now. */ -#include -#include +#include +#include /** * Number of entries in one page table, depends on if we're running riscv32 or @@ -71,4 +71,4 @@ struct vmem { struct vmem *leaf[RISCV_NUM_LEAVES]; }; -#endif /* APOS_RISCV_VMAP_H */ +#endif /* KMI_RISCV_VMAP_H */ diff --git a/arch/riscv64/init/init.c b/arch/riscv64/init/init.c index 498023a..a306b59 100644 --- a/arch/riscv64/init/init.c +++ b/arch/riscv64/init/init.c @@ -7,10 +7,10 @@ * memory. */ -#include -#include -#include -#include +#include +#include +#include +#include #include #include "../kernel/csr.h" diff --git a/arch/riscv64/kernel/cpu.c b/arch/riscv64/kernel/cpu.c index e8c8f34..629e2db 100644 --- a/arch/riscv64/kernel/cpu.c +++ b/arch/riscv64/kernel/cpu.c @@ -6,8 +6,8 @@ * riscv64 implementation of cpu handling. */ -#include -#include +#include +#include #include diff --git a/arch/riscv64/kernel/csr.h b/arch/riscv64/kernel/csr.h index 321af3d..2dda0cb 100644 --- a/arch/riscv64/kernel/csr.h +++ b/arch/riscv64/kernel/csr.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_CSR_H -#define APOS_CSR_H +#ifndef KMI_CSR_H +#define KMI_CSR_H /** * @file csr.h @@ -167,4 +167,4 @@ #define csr_clear(csr, val) \ __asm__ volatile ("csrc " __ASM_STR(csr) ", %0" : : "r" (val) : "memory") -#endif /* APOS_CSR_H */ +#endif /* KMI_CSR_H */ diff --git a/arch/riscv64/kernel/irq.c b/arch/riscv64/kernel/irq.c index a2913a4..023653e 100644 --- a/arch/riscv64/kernel/irq.c +++ b/arch/riscv64/kernel/irq.c @@ -6,8 +6,8 @@ * riscv64 implementation of irq handling. */ -#include -#include +#include +#include #include #include "csr.h" diff --git a/arch/riscv64/kernel/main.c b/arch/riscv64/kernel/main.c index 3d36a22..7e6fbf6 100644 --- a/arch/riscv64/kernel/main.c +++ b/arch/riscv64/kernel/main.c @@ -6,7 +6,7 @@ * riscv64 main */ -#include +#include #include #include "csr.h" diff --git a/arch/riscv64/kernel/pages.h b/arch/riscv64/kernel/pages.h index b26732e..28478a7 100644 --- a/arch/riscv64/kernel/pages.h +++ b/arch/riscv64/kernel/pages.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_PAGES_H -#define APOS_RISCV_PAGES_H +#ifndef KMI_RISCV_PAGES_H +#define KMI_RISCV_PAGES_H /** * @file pages.h @@ -33,4 +33,4 @@ /** riscv64 512GiB page size. */ #define MM_TPAGE_SIZE SZ_512G -#endif /* APOS_RISCV_PAGES_H */ +#endif /* KMI_RISCV_PAGES_H */ diff --git a/arch/riscv64/kernel/power.c b/arch/riscv64/kernel/power.c index 9ea94d6..43d1b4d 100644 --- a/arch/riscv64/kernel/power.c +++ b/arch/riscv64/kernel/power.c @@ -6,7 +6,7 @@ * riscv64 implementation of arch-specific power handling. */ -#include +#include #include "sbi.h" /** diff --git a/arch/riscv64/kernel/proc.c b/arch/riscv64/kernel/proc.c index d58b41b..9b28fc3 100644 --- a/arch/riscv64/kernel/proc.c +++ b/arch/riscv64/kernel/proc.c @@ -6,9 +6,9 @@ * riscv64 implementation of arch-specific process handling. */ -#include -#include -#include +#include +#include +#include #include diff --git a/arch/riscv64/kernel/regs.h b/arch/riscv64/kernel/regs.h index 2c19092..da62a74 100644 --- a/arch/riscv64/kernel/regs.h +++ b/arch/riscv64/kernel/regs.h @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_REGS_H -#define APOS_RISCV_REGS_H +#ifndef KMI_RISCV_REGS_H +#define KMI_RISCV_REGS_H /** * @file regs.h @@ -82,4 +82,4 @@ struct riscv_regs { t6; }; -#endif /* APOS_RISCV_REGS_H */ +#endif /* KMI_RISCV_REGS_H */ diff --git a/arch/riscv64/kernel/sbi.h b/arch/riscv64/kernel/sbi.h index 19cc595..8484d7c 100644 --- a/arch/riscv64/kernel/sbi.h +++ b/arch/riscv64/kernel/sbi.h @@ -1,15 +1,15 @@ /* SPDX-License-Identifier: GPL-3.0-or-later */ /* Copyright 2021 - 2022, Kim Kuparinen < kimi.h.kuparinen@gmail.com > */ -#ifndef APOS_RISCV_SBI_H -#define APOS_RISCV_SBI_H +#ifndef KMI_RISCV_SBI_H +#define KMI_RISCV_SBI_H /** * @file sbi.h * riscv64-specific OpenSBI definitions. */ -#include +#include /** Return structure of SBI calls. */ struct sbiret { @@ -126,4 +126,4 @@ static inline struct sbiret sbi_send_ipi(unsigned long hart_mask, 0); } -#endif /* APOS_RISCV_SBI_H */ +#endif /* KMI_RISCV_SBI_H */ diff --git a/arch/riscv64/kernel/vmem.c b/arch/riscv64/kernel/vmem.c index f9a6784..72e069b 100644 --- a/arch/riscv64/kernel/vmem.c +++ b/arch/riscv64/kernel/vmem.c @@ -6,11 +6,11 @@ * riscv64 implementation of arch-specific virtual memory handling. */ -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include #include #include "pages.h" #include "csr.h" -- cgit v1.3