From dc2e2cc9dc9d7790e23dd9a4ccc265d7bb6d76aa Mon Sep 17 00:00:00 2001 From: Kimplul Date: Mon, 20 Dec 2021 12:28:30 +0200 Subject: Added init back --- arch/riscv/include/csr.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/riscv/include/csr.h') diff --git a/arch/riscv/include/csr.h b/arch/riscv/include/csr.h index 70e60bb..bd02b04 100644 --- a/arch/riscv/include/csr.h +++ b/arch/riscv/include/csr.h @@ -37,6 +37,9 @@ #define EXC_LOAD_PAGE_FAULT 13 #define EXC_STORE_PAGE_FAULT 15 +/* status CSR bits */ +#define SSTATUS_SUM (1 << 18) + /* directly lifted from Linux:/arch/riscv/include/asm/asm.h:9-13 */ #ifdef __ASSEMBLY__ #define __ASM_STR(x) x @@ -50,4 +53,10 @@ #define csr_write(csr, val)\ __asm__ ("csrw " __ASM_STR(csr) ", %0" : : "rK" (val) : "memory") +#define csr_set(csr, val)\ + __asm__ ("csrs " __ASM_STR(csr) ", %0" : : "rK" (val) : "memory") + +#define csr_clear(csr, val)\ + __asm__ ("csrc " __ASM_STR(csr) ", %0" : : "rK" (val) : "memory") + #endif /* APOS_CSR_H */ -- cgit v1.3