kmi - ACTIVE - Kernel with migrating threads as IPC

Age	Commit message (Collapse)	Author
2023-10-09	move rpc stack handling to arch-specific code	Kimplul
	+ Fairly considerable speedup, as we don't have to look up the rpc pte every time separately, instead cacheing them. Adds an architecture specific limitation to total rpc stack size, though.
2023-06-04	visionfive2 boots	Kimplul
	+ Make 8250 serial driver more generic + Still TODO: write a tutorial on how to boot on the visionfive2
2023-05-11	arbitrary load address and RAM base detection	Kimplul
	+ Both kind of go hand in hand, made sense to do both at the same time. Some parts feel slightly hacky, the loader works by placing everything on the stack and avoiding global values. Still, seems to work?
2023-05-01	update license stuff	Kimplul

2023-04-30	rename to kmi	Kimplul

2022-11-13	~1.3M ipc requests	Kimplul
	+ The secret is using gravestones. I'll have to write up full documentation for the feature but essentially riscv lets us encode whatever we want into page table entries, as long as they're not active. We use this to encode highest user address that is not a zero, in that all entries in the top level are either active or gravestones. When an active entry is removed, it is either a gravestone (if there are other active entries above it) or it starts a cascade of removing entries that have been previously removed Slight runtime overhead to page mapping, pretty major advantage in rpc calls. Feature will need to be tested more thorougly, and the init program is sort of a best scenario with just one top level userspace page table entry active at a time, leading to incredibly fast context switches. Current implementation limits a process' max virtual memory to 248 GiB (in Sv39), but I don't think the missing 8 GiB is that big of a deal.
2022-11-12	initial rpc implementations	Kimplul

2022-09-14	riscv32 boots and advances as far as riscv64	Kimplul

2022-09-11	allow building with riscv64-linux-gnu	Kimplul
	+ May warn about PHDR not being in LOAD, there is a flag to silence it (--no-warn-rwx-segment) but it doesn't seem to exist in riscv64-unknown-elf for some reason.
2022-09-02	reserve more space for fw	Kimplul
	+ Doesn't seem to be specified anywhere, but I'll stick with 2MB for now, working on the assumption that the FW is at the start of the physical RAM. Possible TODOs: generate apos.its automatically from init.elf, allocate root_branch statically?
2022-06-12	add license texts	Kimplul

2022-06-11	fix ubsan warning in release mode	Kimplul

2022-06-09	use doxygen todo	Kimplul

2022-06-09	continue documentation	Kimplul

2022-05-29	continue documentation efforts	Kimplul

2022-05-29	continue documentation efforts.	Kimplul

2022-05-22	add @file info to all files	Kimplul
	+ Next step, start documenting contents of each file.
2022-04-23	ran clang-format	Kimplul

2022-04-21	fix warnings on 32bit riscv	Kimplul
	+ Will most probably not work on 32bit, but nice to make 'portable' code.
2022-04-10	add basic ubsan and fix issues reported by it	Kimplul

2022-04-10	add clang format and run it	Kimplul

2022-01-07	Allow building with clang	Kimplul
	+ Release mode is sort of broken, as lto doesn't work with linker relaxation and turning the relaxation off causes issues with the jump from init to kernel (as I've currently implemented it, could probably be fixed with a manual jump from assembly, I'll add it to my TODO list)