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<title>kmi/arch/riscv64/init/start.S, branch master</title>
<subtitle>ACTIVE - Kernel with migrating threads as IPC</subtitle>
<id>https://metanimi.dy.fi/cgit/kmi/atom?h=master</id>
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<updated>2024-07-05T16:38:11Z</updated>
<entry>
<title>allow booting with Qemu's -kernel flag directly</title>
<updated>2024-07-05T16:38:11Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2024-07-05T16:38:11Z</published>
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<id>urn:sha1:e09edb5d54e39bd9509a1dc450df5ab320759f97</id>
<content type='text'>
+ Took some fairly significant changes, for one the kernel is no longer
  relocated at the start of a boot, instead it sits wherever the user
  decides the kernel should sit. Similarly, the initial kernel stack and
  page table are stored within the binary, slightly bloating the size
  but making it much safer to boot since there's really no chance of us
  overwriting the fdt or initrd in memory.
</content>
</entry>
<entry>
<title>start trying to boot on visionfive 2</title>
<updated>2023-05-29T18:31:09Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-29T18:31:09Z</published>
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<id>urn:sha1:3ace1ddd76b9c04f3ed23883de6279b4485612e8</id>
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+ Not bootable quite yet. Among other things, I couldn't
  get the current starfive u-boot fork to boot, so
  try adding support for booting with precompiled u-boot
  via the `go` command. Initial testing with qemu shows that
  this should be possible, and if it works, might be useful
  in the (far) future with other slightly janky SBCs.

  Also, NS16550 is 8250-based, and I'm really only using the base
  8250, so rename and add visionfive 2 uart to list of compatibles.
  Visionfive 2 is still completely untested.
</content>
</entry>
<entry>
<title>fix LLVM compilation</title>
<updated>2023-05-11T21:36:18Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-11T21:36:18Z</published>
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<content type='text'>
+ RELEASE=1 doesn't work for some reason, though
</content>
</entry>
<entry>
<title>arbitrary load address and RAM base detection</title>
<updated>2023-05-11T19:55:31Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-11T19:55:31Z</published>
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<content type='text'>
+ Both kind of go hand in hand, made sense to do both at the same time.

Some parts feel slightly hacky, the loader works by placing everything
on the stack and avoiding global values. Still, seems to work?
</content>
</entry>
<entry>
<title>update license stuff</title>
<updated>2023-05-01T19:02:49Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-01T19:02:49Z</published>
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</content>
</entry>
<entry>
<title>beautification</title>
<updated>2022-10-21T18:34:18Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-10-21T18:34:18Z</published>
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</content>
</entry>
<entry>
<title>add license texts</title>
<updated>2022-06-12T10:58:42Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-06-12T10:58:42Z</published>
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</content>
</entry>
<entry>
<title>continue documentation efforts.</title>
<updated>2022-05-28T22:07:48Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-05-28T22:07:48Z</published>
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</content>
</entry>
<entry>
<title>Allow building with clang</title>
<updated>2022-01-07T12:05:06Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-01-06T21:39:12Z</published>
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<id>urn:sha1:9cc125fb3cfdc2c8ae7153b5ae0fe705980835fb</id>
<content type='text'>
+ Release mode is sort of broken, as lto doesn't work with linker
  relaxation and turning the relaxation off causes issues with the jump
  from init to kernel (as I've currently implemented it, could probably
  be fixed with a manual jump from assembly, I'll add it to my TODO
  list)
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</entry>
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