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<title>kmi/arch/riscv64/init/init.c, branch master</title>
<subtitle>ACTIVE - Kernel with migrating threads as IPC</subtitle>
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<updated>2024-07-05T16:38:11Z</updated>
<entry>
<title>allow booting with Qemu's -kernel flag directly</title>
<updated>2024-07-05T16:38:11Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2024-07-05T16:38:11Z</published>
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<id>urn:sha1:e09edb5d54e39bd9509a1dc450df5ab320759f97</id>
<content type='text'>
+ Took some fairly significant changes, for one the kernel is no longer
  relocated at the start of a boot, instead it sits wherever the user
  decides the kernel should sit. Similarly, the initial kernel stack and
  page table are stored within the binary, slightly bloating the size
  but making it much safer to boot since there's really no chance of us
  overwriting the fdt or initrd in memory.
</content>
</entry>
<entry>
<title>add initial smp bringup</title>
<updated>2023-08-04T17:50:41Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-08-04T17:50:41Z</published>
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<entry>
<title>visionfive2 boots until debugging is initialized</title>
<updated>2023-06-03T21:48:15Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-06-03T21:48:15Z</published>
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<id>urn:sha1:52e5c94314fa8e10efded82db85d181ed32f00bd</id>
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</content>
</entry>
<entry>
<title>start trying to boot on visionfive 2</title>
<updated>2023-05-29T18:31:09Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-29T18:31:09Z</published>
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<id>urn:sha1:3ace1ddd76b9c04f3ed23883de6279b4485612e8</id>
<content type='text'>
+ Not bootable quite yet. Among other things, I couldn't
  get the current starfive u-boot fork to boot, so
  try adding support for booting with precompiled u-boot
  via the `go` command. Initial testing with qemu shows that
  this should be possible, and if it works, might be useful
  in the (far) future with other slightly janky SBCs.

  Also, NS16550 is 8250-based, and I'm really only using the base
  8250, so rename and add visionfive 2 uart to list of compatibles.
  Visionfive 2 is still completely untested.
</content>
</entry>
<entry>
<title>arbitrary load address and RAM base detection</title>
<updated>2023-05-11T19:55:31Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-11T19:55:31Z</published>
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+ Both kind of go hand in hand, made sense to do both at the same time.

Some parts feel slightly hacky, the loader works by placing everything
on the stack and avoiding global values. Still, seems to work?
</content>
</entry>
<entry>
<title>update license stuff</title>
<updated>2023-05-01T19:02:49Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-05-01T19:02:49Z</published>
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</content>
</entry>
<entry>
<title>rename to kmi</title>
<updated>2023-04-30T14:06:02Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2023-04-30T14:06:02Z</published>
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</entry>
<entry>
<title>change syscalls to take 5 params and return 6</title>
<updated>2022-09-15T16:46:07Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-09-15T16:21:14Z</published>
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+ In total, a syscall is built up of 6 values, with the first being the
  syscall number. Symmetrically, the first value is now a status and the
  following five values return "values". This allows us to cram in more
  info into the ipc_* functions. The performance difference is
  absolutely minimal, at least from my testing in qemu.
</content>
</entry>
<entry>
<title>riscv32 boots and advances as far as riscv64</title>
<updated>2022-09-14T18:21:27Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-09-11T18:50:55Z</published>
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</entry>
<entry>
<title>allow building with riscv64-linux-gnu</title>
<updated>2022-09-10T22:09:02Z</updated>
<author>
<name>Kimplul</name>
<email>kimi.h.kuparinen@gmail.com</email>
</author>
<published>2022-09-10T22:07:52Z</published>
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<content type='text'>
+ May warn about PHDR not being in LOAD, there is a flag to silence it
  (--no-warn-rwx-segment) but it doesn't seem to exist in
  riscv64-unknown-elf for some reason.
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