From 452cab52de2107c1ce8c7eb0883ff80bb80ac76b Mon Sep 17 00:00:00 2001 From: Kimplul Date: Mon, 15 Dec 2025 01:25:53 +0200 Subject: add initial simt rv64 core --- src/cpu/riscv/source.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/cpu/riscv/source.mk') diff --git a/src/cpu/riscv/source.mk b/src/cpu/riscv/source.mk index 57e0bf9..dd3240e 100644 --- a/src/cpu/riscv/source.mk +++ b/src/cpu/riscv/source.mk @@ -1 +1,2 @@ -GRAN_SOURCES += src/cpu/riscv/simple_riscv64.c +GRAN_SOURCES += src/cpu/riscv/simple_riscv64.c \ + src/cpu/riscv/simt_riscv64.c -- cgit v1.3